From: Tom Lendacky <thomas.lendacky@amd.com>
To: Ard Biesheuvel <ardb+git@google.com>, linux-kernel@vger.kernel.org
Cc: linux-efi@vger.kernel.org, x86@kernel.org,
Ard Biesheuvel <ardb@kernel.org>, Borislav Petkov <bp@alien8.de>,
Ingo Molnar <mingo@kernel.org>,
Dionna Amalie Glaze <dionnaglaze@google.com>,
Kevin Loughlin <kevinloughlin@google.com>,
Josh Poimboeuf <jpoimboe@kernel.org>,
Peter Zijlstra <peterz@infradead.org>
Subject: Re: [PATCH v4 01/24] x86/sev: Separate MSR and GHCB based snp_cpuid() via a callback
Date: Wed, 9 Jul 2025 10:12:48 -0500 [thread overview]
Message-ID: <74889161-adfa-3547-d8a9-3ff154098c7a@amd.com> (raw)
In-Reply-To: <20250709080840.2233208-27-ardb+git@google.com>
On 7/9/25 03:08, Ard Biesheuvel wrote:
> From: Ard Biesheuvel <ardb@kernel.org>
>
> There are two distinct callers of snp_cpuid(): one where the MSR
> protocol is always used, and one where the GHCB page based interface is
> always used.
>
> The snp_cpuid() logic does not care about the distinction, which only
> matters at a lower level. But the fact that it supports both interfaces
> means that the GHCB page based logic is pulled into the early startup
> code where PA to VA conversions are problematic, given that it runs from
> the 1:1 mapping of memory.
>
> So keep snp_cpuid() itself in the startup code, but factor out the
> hypervisor calls via a callback, so that the GHCB page handling can be
> moved out.
>
> Code refactoring only - no functional change intended.
>
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> ---
> arch/x86/boot/startup/sev-shared.c | 64 ++++----------------
> arch/x86/coco/sev/vc-shared.c | 49 ++++++++++++++-
> arch/x86/include/asm/sev.h | 3 +-
> 3 files changed, 63 insertions(+), 53 deletions(-)
>
> diff --git a/arch/x86/boot/startup/sev-shared.c b/arch/x86/boot/startup/sev-shared.c
> index 7a706db87b93..992abfa50508 100644
> --- a/arch/x86/boot/startup/sev-shared.c
> +++ b/arch/x86/boot/startup/sev-shared.c
> @@ -319,7 +319,7 @@ static int __sev_cpuid_hv(u32 fn, int reg_idx, u32 *reg)
> return 0;
> }
>
> -static int __sev_cpuid_hv_msr(struct cpuid_leaf *leaf)
> +static int __sev_cpuid_msr_prot(struct cpuid_leaf *leaf)
Not sure the renaming makes it read any easier or say anything more. It
does add extra changes to the diff that have to be read through, though,
so I don't think it is beneficial.
> {
> int ret;
>
> @@ -342,44 +342,7 @@ static int __sev_cpuid_hv_msr(struct cpuid_leaf *leaf)
> return ret;
> }
>
> -static int __sev_cpuid_hv_ghcb(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)
> -{
> - u32 cr4 = native_read_cr4();
> - int ret;
> -
> - ghcb_set_rax(ghcb, leaf->fn);
> - ghcb_set_rcx(ghcb, leaf->subfn);
> -
> - if (cr4 & X86_CR4_OSXSAVE)
> - /* Safe to read xcr0 */
> - ghcb_set_xcr0(ghcb, xgetbv(XCR_XFEATURE_ENABLED_MASK));
> - else
> - /* xgetbv will cause #UD - use reset value for xcr0 */
> - ghcb_set_xcr0(ghcb, 1);
> -
> - ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_CPUID, 0, 0);
> - if (ret != ES_OK)
> - return ret;
> -
> - if (!(ghcb_rax_is_valid(ghcb) &&
> - ghcb_rbx_is_valid(ghcb) &&
> - ghcb_rcx_is_valid(ghcb) &&
> - ghcb_rdx_is_valid(ghcb)))
> - return ES_VMM_ERROR;
>
> - leaf->eax = ghcb->save.rax;
> - leaf->ebx = ghcb->save.rbx;
> - leaf->ecx = ghcb->save.rcx;
> - leaf->edx = ghcb->save.rdx;
> -
> - return ES_OK;
> -}
> -
> -static int sev_cpuid_hv(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)
> -{
> - return ghcb ? __sev_cpuid_hv_ghcb(ghcb, ctxt, leaf)
> - : __sev_cpuid_hv_msr(leaf);
> -}
>
> /*
> * This may be called early while still running on the initial identity
> @@ -484,21 +447,20 @@ snp_cpuid_get_validated_func(struct cpuid_leaf *leaf)
> return false;
> }
>
> -static void snp_cpuid_hv(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)
> +static void snp_cpuid_msr_prot(void *ctx, struct cpuid_leaf *leaf)
> {
> - if (sev_cpuid_hv(ghcb, ctxt, leaf))
> + if (__sev_cpuid_msr_prot(leaf))
> sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_CPUID_HV);
> }
>
> -static int __head
> -snp_cpuid_postprocess(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
> - struct cpuid_leaf *leaf)
> +static int __head snp_cpuid_postprocess(void (*cpuid)(void *ctx, struct cpuid_leaf *),
> + void *ctx, struct cpuid_leaf *leaf)
> {
> struct cpuid_leaf leaf_hv = *leaf;
>
> switch (leaf->fn) {
> case 0x1:
> - snp_cpuid_hv(ghcb, ctxt, &leaf_hv);
> + cpuid(ctx, &leaf_hv);
Maybe rename this parameter to snp_cpuid or snp_cpuid_fn or similar,
because it can be very confusing to see "cpuid" on its own like this.
>
> /* initial APIC ID */
> leaf->ebx = (leaf_hv.ebx & GENMASK(31, 24)) | (leaf->ebx & GENMASK(23, 0));
> @@ -517,7 +479,7 @@ snp_cpuid_postprocess(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
> break;
> case 0xB:
> leaf_hv.subfn = 0;
> - snp_cpuid_hv(ghcb, ctxt, &leaf_hv);
> + cpuid(ctx, &leaf_hv);
>
> /* extended APIC ID */
> leaf->edx = leaf_hv.edx;
> @@ -565,7 +527,7 @@ snp_cpuid_postprocess(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
> }
> break;
> case 0x8000001E:
> - snp_cpuid_hv(ghcb, ctxt, &leaf_hv);
> + cpuid(ctx, &leaf_hv);
>
> /* extended APIC ID */
> leaf->eax = leaf_hv.eax;
> @@ -586,8 +548,8 @@ snp_cpuid_postprocess(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
> * Returns -EOPNOTSUPP if feature not enabled. Any other non-zero return value
> * should be treated as fatal by caller.
> */
> -int __head
> -snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)
> +int __head snp_cpuid(void (*cpuid)(void *ctx, struct cpuid_leaf *), void *ctx,
> + struct cpuid_leaf *leaf)
> {
> const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table();
>
> @@ -621,7 +583,7 @@ snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)
> return 0;
> }
>
> - return snp_cpuid_postprocess(ghcb, ctxt, leaf);
> + return snp_cpuid_postprocess(cpuid, ctx, leaf);
> }
>
> /*
> @@ -648,14 +610,14 @@ void __head do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code)
> leaf.fn = fn;
> leaf.subfn = subfn;
>
> - ret = snp_cpuid(NULL, NULL, &leaf);
> + ret = snp_cpuid(snp_cpuid_msr_prot, NULL, &leaf);
> if (!ret)
> goto cpuid_done;
>
> if (ret != -EOPNOTSUPP)
> goto fail;
>
> - if (__sev_cpuid_hv_msr(&leaf))
> + if (__sev_cpuid_msr_prot(&leaf))
> goto fail;
>
> cpuid_done:
> diff --git a/arch/x86/coco/sev/vc-shared.c b/arch/x86/coco/sev/vc-shared.c
> index 2c0ab0fdc060..776cb90be530 100644
> --- a/arch/x86/coco/sev/vc-shared.c
> +++ b/arch/x86/coco/sev/vc-shared.c
> @@ -409,15 +409,62 @@ static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
> return ret;
> }
>
> +static int __sev_cpuid_ghcb_prot(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)
Ditto here and below, keeping the __sev_cpuid_hv_ghcb() /
sev_cpuid_hv_ghcb() name would be best.
Thanks,
Tom
> +{
> + u32 cr4 = native_read_cr4();
> + int ret;
> +
> + ghcb_set_rax(ghcb, leaf->fn);
> + ghcb_set_rcx(ghcb, leaf->subfn);
> +
> + if (cr4 & X86_CR4_OSXSAVE)
> + /* Safe to read xcr0 */
> + ghcb_set_xcr0(ghcb, xgetbv(XCR_XFEATURE_ENABLED_MASK));
> + else
> + /* xgetbv will cause #UD - use reset value for xcr0 */
> + ghcb_set_xcr0(ghcb, 1);
> +
> + ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_CPUID, 0, 0);
> + if (ret != ES_OK)
> + return ret;
> +
> + if (!(ghcb_rax_is_valid(ghcb) &&
> + ghcb_rbx_is_valid(ghcb) &&
> + ghcb_rcx_is_valid(ghcb) &&
> + ghcb_rdx_is_valid(ghcb)))
> + return ES_VMM_ERROR;
> +
> + leaf->eax = ghcb->save.rax;
> + leaf->ebx = ghcb->save.rbx;
> + leaf->ecx = ghcb->save.rcx;
> + leaf->edx = ghcb->save.rdx;
> +
> + return ES_OK;
> +}
> +
> +struct cpuid_ctx {
> + struct ghcb *ghcb;
> + struct es_em_ctxt *ctxt;
> +};
> +
> +static void snp_cpuid_ghcb_prot(void *p, struct cpuid_leaf *leaf)
> +{
> + struct cpuid_ctx *ctx = p;
> +
> + if (__sev_cpuid_ghcb_prot(ctx->ghcb, ctx->ctxt, leaf))
> + sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_CPUID_HV);
> +}
> +
> static int vc_handle_cpuid_snp(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
> {
> + struct cpuid_ctx ctx = { ghcb, ctxt };
> struct pt_regs *regs = ctxt->regs;
> struct cpuid_leaf leaf;
> int ret;
>
> leaf.fn = regs->ax;
> leaf.subfn = regs->cx;
> - ret = snp_cpuid(ghcb, ctxt, &leaf);
> + ret = snp_cpuid(snp_cpuid_ghcb_prot, &ctx, &leaf);
> if (!ret) {
> regs->ax = leaf.eax;
> regs->bx = leaf.ebx;
> diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h
> index 89075ff19afa..2cabf617de3c 100644
> --- a/arch/x86/include/asm/sev.h
> +++ b/arch/x86/include/asm/sev.h
> @@ -552,7 +552,8 @@ struct cpuid_leaf {
> u32 edx;
> };
>
> -int snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf);
> +int snp_cpuid(void (*cpuid_hv)(void *ctx, struct cpuid_leaf *),
> + void *ctx, struct cpuid_leaf *leaf);
>
> void __noreturn sev_es_terminate(unsigned int set, unsigned int reason);
> enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
next prev parent reply other threads:[~2025-07-09 15:12 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-09 8:08 [PATCH v4 00/24] x86: strict separation of startup code Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 01/24] x86/sev: Separate MSR and GHCB based snp_cpuid() via a callback Ard Biesheuvel
2025-07-09 15:12 ` Tom Lendacky [this message]
2025-07-09 23:21 ` Ard Biesheuvel
2025-07-11 20:59 ` Borislav Petkov
2025-07-12 14:54 ` Tom Lendacky
2025-07-12 15:02 ` Borislav Petkov
2025-07-09 8:08 ` [PATCH v4 02/24] x86/sev: Use MSR protocol for remapping SVSM calling area Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 03/24] x86/sev: Use MSR protocol only for early SVSM PVALIDATE call Ard Biesheuvel
2025-07-09 15:50 ` Tom Lendacky
2025-07-09 8:08 ` [PATCH v4 04/24] x86/sev: Run RMPADJUST on SVSM calling area page to test VMPL Ard Biesheuvel
2025-07-09 16:13 ` Tom Lendacky
2025-07-09 8:08 ` [PATCH v4 05/24] x86/sev: Move GHCB page based HV communication out of startup code Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 06/24] x86/sev: Avoid global variable to store virtual address of SVSM area Ard Biesheuvel
2025-07-09 17:49 ` Tom Lendacky
2025-07-09 8:08 ` [PATCH v4 07/24] x86/sev: Move MSR save/restore out of early page state change helper Ard Biesheuvel
2025-07-09 18:16 ` Tom Lendacky
2025-07-09 8:08 ` [PATCH v4 08/24] x86/sev: Share implementation of MSR-based page state change Ard Biesheuvel
2025-07-09 18:24 ` Tom Lendacky
2025-07-15 5:09 ` Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 09/24] x86/sev: Pass SVSM calling area down to early page state change API Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 10/24] x86/sev: Use boot SVSM CA for all startup and init code Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 11/24] x86/boot: Drop redundant RMPADJUST in SEV SVSM presence check Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 12/24] x86/sev: Unify SEV-SNP hypervisor feature check Ard Biesheuvel
2025-07-10 4:21 ` Nikunj A Dadhania
2025-07-10 4:24 ` Ard Biesheuvel
[not found] ` <85o6tsv8m2.fsf@amd.com>
2025-07-10 7:36 ` Ard Biesheuvel
2025-07-10 8:02 ` Nikunj A Dadhania
2025-07-09 8:08 ` [PATCH v4 13/24] x86/boot: Provide PIC aliases for 5-level paging related constants Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 14/24] x86/sev: Provide PIC aliases for SEV related data objects Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 15/24] x86/sev: Move __sev_[get|put]_ghcb() into separate noinstr object Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 16/24] x86/sev: Export startup routines for later use Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 17/24] objtool: Add action to check for absence of absolute relocations Ard Biesheuvel
2025-07-09 8:08 ` [PATCH v4 18/24] x86/boot: Check startup code " Ard Biesheuvel
2025-07-09 8:09 ` [PATCH v4 19/24] x86/boot: Revert "Reject absolute references in .head.text" Ard Biesheuvel
2025-07-09 8:09 ` [PATCH v4 20/24] x86/kbuild: Incorporate boot/startup/ via Kbuild makefile Ard Biesheuvel
2025-07-09 8:09 ` [PATCH v4 21/24] x86/boot: Create a confined code area for startup code Ard Biesheuvel
2025-07-09 8:09 ` [PATCH v4 22/24] efistub/x86: Remap inittext read-execute when needed Ard Biesheuvel
2025-07-09 8:09 ` [PATCH v4 23/24] x86/boot: Move startup code out of __head section Ard Biesheuvel
2025-07-09 8:09 ` [PATCH v4 24/24] x86/boot: Get rid of the .head.text section Ard Biesheuvel
2025-07-09 10:23 ` [PATCH v4 00/24] x86: strict separation of startup code Kirill A. Shutemov
2025-07-09 10:32 ` Ard Biesheuvel
2025-07-09 14:01 ` Nikunj A Dadhania
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