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client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by DS3PEPF0000C380.mail.protection.outlook.com (10.167.23.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.8 via Frontend Transport; Fri, 18 Sep 2026 05:33:38 +0000 Received: from satlexmb08.amd.com (10.181.42.217) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49; Fri, 18 Sep 2026 00:33:38 -0500 Received: from [10.136.41.131] (10.180.168.240) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server id 15.2.2562.49 via Frontend Transport; Fri, 18 Sep 2026 00:33:36 -0500 Message-ID: <748cb8d6-174c-4cad-98bc-ebb985e2eced@amd.com> Date: Fri, 18 Sep 2026 11:03:35 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] cpufreq/amd-pstate: Do not fail init when auto_sel cannot be written To: Wentao Guan , CC: , , , , , LFRon References: <20260918044215.41400-1-guanwentao@uniontech.com> Content-Language: en-US From: K Prateek Nayak In-Reply-To: <20260918044215.41400-1-guanwentao@uniontech.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zju+8VSWTIWIpXaFzXEx7JG39ESw0iBmGZlMcCJXluFlASUqUdcvPPytW45UCIRpIM2jI7uErPz+FVfBflE76Wsf62rctSYZh15mp9UYvPj2o1H6xkSnGhMKlgiBVPDdZjjK5/EaBXAMi346TpHmDiYkBloCV9IPa3OZ6W6GOkXTY6P64MVFzv5CSLWKz/b8FZxNiibDDjU7CF5qEyXLnPteBCT12/fVB3EFNexal7fonCVTJ3FXKEFQE7RSUsrS1Op9HDBiJf6T2EFGDdLvN9Fr/yiijKiJ2z9CNhJboYxlmvGSW/oGHOZRuxe23+ryl9I/vHxrAUv3zqRjLHly0jdaZh6OQb43z/5utE7JSZ6YmL46iL+h/ydLwK3bmZ/FqXjmHsqjffX1BDTTXZ0ur9k2Z4sbtfXUtREpgPgBLPv6omfMxJnNpnYJN9CytQuZ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2026 05:33:38.8804 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8d646fc9-ecae-415b-4322-08df15466497 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C380.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6558 Hello Wentao, On 9/18/2026 10:12 AM, Wentao Guan wrote: > Since commit 9dfd13f80c85 ("cpufreq/amd-pstate: Toggle auto_sel in active > mode on shared memory systems"), shmem_init_perf() programs > AUTONOMOUS_SELECTION_ENABLE unconditionally, including in active mode. > > On platforms implementing CPPC v2 and below, _CPC reports Autonomous > Selection Enable as a plain integer rather than as a register descriptor. > Such a field is a read-only capability flag: cppc_get_reg_val() reads it > back successfully (the firmware reports it as enabled), while > cppc_set_reg_val() rejects the write with -EOPNOTSUPP because the entry is > not an ACPI_TYPE_BUFFER. Ah! So it is one of those platforms that fall into: Platforms that exclusively support Autonomous Selection must populate this field as an Integer with a value of 1. as per the ACPI spec. > > shmem_init_perf() propagates that error, so every amd_pstate_epp_cpu_init() > fails, cpufreq_register_driver() ends up with an empty policy list and > returns -ENODEV, and amd-pstate refuses to load at all: > > amd_pstate: failed to set auto_sel, ret: -95 > amd_pstate: Failed to initialize CPU 0: -95 > ... > amd_pstate: failed to register with return -19 > > Failing to write auto_sel is not fatal: the register is either already > enabled, as reported by the cppc_get_auto_sel() call right above, or not > writable at all, and active mode worked in both cases before the offending > commit. Downgrade the failure to a warning and let initialization > continue, matching how the cppc_get_auto_sel() failure is handled. Can't we just skip cppc_set_auto_sel() if the auto_sel is already at the desired value? Something like: (Completely untested) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index d4ff8b228f86..ed540da818ef 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -524,6 +524,9 @@ static int shmem_init_perf(struct amd_cpudata *cpudata) return 0; } + if ((cppc_state != AMD_PSTATE_PASSIVE) == auto_sel) + return 0; + ret = cppc_set_auto_sel(cpudata->cpu, (cppc_state == AMD_PSTATE_PASSIVE) ? 0 : 1); --- That way we fail for passive mode switch which will operate under incorrectly assumptions since these platform only supports autonomous modes. Thoughts? > > Fixes: 9dfd13f80c85 ("cpufreq/amd-pstate: Toggle auto_sel in active mode on shared memory systems") > Cc: stable@vger.kernel.org > Tested-by: LFRon > Signed-off-by: Wentao Guan > --- > drivers/cpufreq/amd-pstate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c > index 80d99ba1902c9..3657c5cccd4d8 100644 > --- a/drivers/cpufreq/amd-pstate.c > +++ b/drivers/cpufreq/amd-pstate.c > @@ -538,5 +538,5 @@ static int shmem_init_perf(struct amd_cpudata *cpudata) > if (ret) > pr_warn("failed to set auto_sel, ret: %d\n", ret); > > - return ret; > + return 0; > } -- Thanks and Regards, Prateek