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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2466889c61bsm133558605ad.143.2025.08.27.18.40.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Aug 2025 18:41:02 -0700 (PDT) Message-ID: <749ec6d1-f2f9-40f5-9c41-3443698f250a@oss.qualcomm.com> Date: Thu, 28 Aug 2025 09:40:51 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 07/14] phy: qcom: qmp-usbc: Move reset and regulator config into PHY cfg To: Dmitry Baryshkov Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Vinod Koul , Kishon Vijay Abraham I , Philipp Zabel , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, fange.zhang@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, Bjorn Andersson , Konrad Dybcio References: <20250820-add-displayport-support-for-qcs615-platform-v3-0-a43bd25ec39c@oss.qualcomm.com> <20250820-add-displayport-support-for-qcs615-platform-v3-7-a43bd25ec39c@oss.qualcomm.com> <6f7c3962-ccfc-4400-a77f-399b06da93e1@oss.qualcomm.com> From: Xiangxu Yin In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: FmcTT1_9KAd4I0SRgL1PUix5bwj1TtEX X-Proofpoint-ORIG-GUID: FmcTT1_9KAd4I0SRgL1PUix5bwj1TtEX X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDAzMyBTYWx0ZWRfX6haory+nIupz D8OXlopZDNjSZQbPJVvRhVOb5zqOg+SpP2HNPTwsfKMOaGvE3uPGHFiWV62zxIj536U0Ek/7CXe sdoO/CybIcfhDu9nTATD+xE96pCs/mZsZHG//1C1EjhL09n3wXJ3RFiL2qOd5KeL8fhPleGLN1I rjaXIiDOmQe+Wf9tzg6Ocn44qXhGnTcalP8ienvpNKcgF/Wn3ReK2cT4zGHW+wxqoST/wmh74PU B2rJhDbUyHTxyPynBAr078l76rZriB+Wm5YnldHlp6BeifhsPFA6xIc/5G6wsRNbBtv0un1TjwB fS3CZSk64RQX64+UVMY0ybrInXVTustRik7h8UipnW8CmuPkcYerUc4EafGb/YjWXvgxDCVI/it 1tQFNRSU X-Authority-Analysis: v=2.4 cv=BJazrEQG c=1 sm=1 tr=0 ts=68afb3b1 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=EUspDBNiAAAA:8 a=Nindc6OTbrst8G9qLT4A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-27_04,2025-08-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 bulkscore=0 phishscore=0 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230033 On 8/27/2025 10:31 PM, Dmitry Baryshkov wrote: > On Wed, Aug 27, 2025 at 09:28:00PM +0800, Xiangxu Yin wrote: >> On 8/22/2025 6:08 PM, Dmitry Baryshkov wrote: >>> On Fri, Aug 22, 2025 at 04:29:28PM +0800, Xiangxu Yin wrote: >>>> On 8/20/2025 7:30 PM, Dmitry Baryshkov wrote: >>>>> On Wed, Aug 20, 2025 at 05:34:49PM +0800, Xiangxu Yin wrote: >>>>>> Refactor reset and regulator configuration to be managed via qmp_phy_cfg >>>>>> instead of hardcoded lists. This enables per-PHY customization and >>>>>> simplifies initialization logic for USB-only and USB/DP switchable PHYs. >>>>> Please split into two patches in order to simplify reviewing. >>>> Ok, will split reset and regulator part. >>>> >>>> >>>>>> Signed-off-by: Xiangxu Yin >>>>>> --- >>>>>> drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 108 +++++++++++++++---------------- >>>>>> 1 file changed, 53 insertions(+), 55 deletions(-) >>>>>> >>>>>> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c >>>>>> index 61128d606238321d1b573655b3b987226aa2d594..4e797b7e65da0e3a827efa9a179f1c150c1b8b00 100644 >>>>>> --- a/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c >>>>>> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usbc.c >>>>>> @@ -421,8 +421,9 @@ struct qmp_phy_cfg { >>>>>> int (*configure_dp_phy)(struct qmp_usbc *qmp); >>>>>> int (*calibrate_dp_phy)(struct qmp_usbc *qmp); >>>>>> >>>>>> - /* regulators to be requested */ >>>>>> - const char * const *vreg_list; >>>>>> + const char * const *reset_list; >>>>>> + int num_resets; >>>>>> + const struct regulator_bulk_data *vreg_list; >>>>>> int num_vregs; >>>>>> >>>>>> /* array of registers with different offsets */ >>>>>> @@ -453,7 +454,6 @@ struct qmp_usbc { >>>>>> struct clk_hw dp_pixel_hw; >>>>>> struct clk_bulk_data *clks; >>>>>> int num_clks; >>>>>> - int num_resets; >>>>>> struct reset_control_bulk_data *resets; >>>>>> struct regulator_bulk_data *vregs; >>>>>> >>>>>> @@ -514,9 +514,18 @@ static const char * const usb3phy_reset_l[] = { >>>>>> "phy_phy", "phy", >>>>>> }; >>>>>> >>>>>> -/* list of regulators */ >>>>>> -static const char * const qmp_phy_vreg_l[] = { >>>>>> - "vdda-phy", "vdda-pll", >>>>>> +static const char * const usb3dpphy_reset_l[] = { >>>>>> + "phy_phy", "dp_phy", >>>>>> +}; >>>>>> + >>>>>> +static const struct regulator_bulk_data qmp_phy_usb_vreg_l[] = { >>>>>> + { .supply = "vdda-phy" }, >>>>>> + { .supply = "vdda-pll" }, >>>>> Please fill in the values for all platforms. It well might be that they >>>>> all share the same current requirements. >>>> I checked previous DP projects and found all platforms configured vdda-phy with 21.8mA and vdda-pll with 36mA. >>> No. On SDM660 and MSM8998 DP defines 73.4 mA for 0.9V supply and >>> 12.560 mA for 1.8 V supply. >>> >>>> However, I didn’t find USB load configs in downstream and from SoC related power grids: >>> Please check the actual HW documentation for those platforms. >>> >>>> QCS615 >>>> L12A: VDDA_USB0_SS_1P8/VDDA_USB1_SS_1P8 Ipk:20ma >>>> L5A: VDDA_USB0_SS_0P9/VDDA_USB1_SS_0P9 Ipk:50mA >>>> >>>> sm6150 >>>> L11A: VDDA_USB0_SS_1P8/VDDA_USB1_SS_1P8 Ipk:20ma >>>> L4A: VDDA_USB0_SS_0P9/VDDA_USB1_SS_0P9 Ipk:50mA >>>> >>>> SM6115 >>>> L12A: VDDA_USB_SS_DP_1P8 Ipk:13.3mA >>>> L4A: VDDA_USB_SS_DP_CORE Ipk:66.1mA >>>> >>>> QCM2290 >>>> L13A: VDDA_USB_SS_DP_1P8 Ipk:13.3mA >>>> L12A: VDDA_USB_SS_DP_CORE Ipk:66.1mA >>>> >>>> sdm660 >>>> LDO10A: VDDA_USB_SS_1P8 Ipk:14mA >>>> LDO1B: VDDA_USB_SS_CORE Ipk:68.6mA >>>> >>>> msm8998 >>>> L2A: VDDA_USB_SS_1P2 Ipk:14.2mA >>>> L1A: VDDA_USB_SS_CORE Ipk:68.6mA >>>> >>>> It seems the USB power requirements vary across platforms, and the >>>> 21800 µA load for vdda-phy exceeds the Ipk range in most cases. >>> Ipk being ? >> >> IPK: Instantaneous Peak Current >> >> >>>> I also tested removing the load settings for USB+DP PHY, and DP still works fine. >>> It mostly works either because we don't allow mode switching on older >>> platforms (yet) or because somebody else has already voted and that vote >>> keeps the required mode. >>> >>> As you've started looking on specifying proper current load, please >>> finish the work. >> >> Discussed with chip validation and power SW teams. >> >> The power grid tables are primarily used to ensure each module receives  >> the correct voltage, and they define the Ipk for each submodule.  >> >> While they don’t specify recommended regulator load values, the Ipk values >> reflect the expected power domain strength and can help estimate the voting >> strength needed for each supply. >> >> Since regulator load is mainly used for voting, I’ll define init_load_uA in >> the next patch based on each SoC’s Ipk values to better align with hardware expectations. > If the Ipk is defined per module, then it's fine. Yes, under each regulator, multiple submodules are powered, and each submodule defines its own Ipk value.