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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af635a669c8sm733134866b.72.2025.07.30.05.45.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Jul 2025 05:45:20 -0700 (PDT) Message-ID: <74e3836e-af29-4b5f-b644-23bdff084c78@oss.qualcomm.com> Date: Wed, 30 Jul 2025 14:45:13 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] drm/msm: update the high bitfield of certain DSI registers To: Ayushi Makhija , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: robdclark@gmail.com, lumag@kernel.org, sean@poorly.run, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, quic_rajeevny@quicinc.com, quic_vproddut@quicinc.com, quic_jesszhan@quicinc.com References: <20250730123938.1038640-1-quic_amakhija@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250730123938.1038640-1-quic_amakhija@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 1ObQ63A1JDgcs96n14PW1sfzypm8_Vs- X-Authority-Analysis: v=2.4 cv=Pfv/hjhd c=1 sm=1 tr=0 ts=688a13e2 cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=e5mUnYsNAAAA:8 a=COk6AnOGAAAA:8 a=GqOxEGSAyoRmTf9NYtcA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 a=Vxmtnl_E_bksehYqCbjh:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: 1ObQ63A1JDgcs96n14PW1sfzypm8_Vs- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzMwMDA5MSBTYWx0ZWRfX+8CiwEWl1YYJ kW1w1LDoUVu17p+x69vFKlnA+bQdRCk8z7M4MCCeQ7r+gGTv3piTkMcDpyvTGCtvpslwvfpjI0a 3YU31uiCCt9GDggu8pVx41YhCT45CELmkcupVwiSvf+XL9dEnEkZeT0VUekQcR7OxYalSGaJ070 BEfMUIJtth5Bb2dGveb7yc3OMtCTFZz38aUxrVcIeb0DkedEt32tmdm+XT3nJzg42cmrzN3h4q+ PPZ5R5zIhvN0IMFq0ZpuI6Rx53Pbe2iR5fdovgQoAmnCLD/W4G6v9f2r09w51ZmS7mFyu561CGP PemdjtghKtshcTKkguCupx06V8QewUE9+hvIE1ezbvFNmyZ00Sln/+7JcxxfvUqGs6XK5z1gdL7 lx1AnH2ePexENFlM9wFZIAUrbwO6w5wFVPbUgvEGv3L23GnKveSEa/Wz3fdu/vezurV8vi6X X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-30_04,2025-07-30_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=920 clxscore=1015 adultscore=0 priorityscore=1501 mlxscore=0 spamscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 impostorscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507300091 On 7/30/25 2:39 PM, Ayushi Makhija wrote: > Currently, the high bitfield of certain DSI registers > do not align with the configuration of the SWI registers > description. This can lead to wrong programming these DSI > registers, for example for 4k resloution where H_TOTAL is > taking 13 bits but software is programming only 12 bits > because of the incorrect bitmask for H_TOTAL bitfeild, > this is causing DSI FIFO errors. To resolve this issue, > increase the high bitfield of the DSI registers from 12 bits > to 16 bits in dsi.xml to match the SWI register configuration. > > Signed-off-by: Ayushi Makhija > --- > drivers/gpu/drm/msm/registers/display/dsi.xml | 28 +++++++++---------- > 1 file changed, 14 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/msm/registers/display/dsi.xml b/drivers/gpu/drm/msm/registers/display/dsi.xml > index 501ffc585a9f..c7a7b633d747 100644 > --- a/drivers/gpu/drm/msm/registers/display/dsi.xml > +++ b/drivers/gpu/drm/msm/registers/display/dsi.xml > @@ -159,28 +159,28 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd"> > > > > - > - > + > + > > > - > - > + > + > > > - > - > + > + > > > - > - > + > + > > > - > - > + > + > > FWIW looks like at least on 8280, ACTIVE_VSYNC_HPOS offset = 0x38 and HPOS doesn't exist Konrad