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Received: from AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) by DU2PR04MB8632.eurprd04.prod.outlook.com (2603:10a6:10:2df::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9678.18; Fri, 6 Mar 2026 08:13:56 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::4609:64af:8a4b:fd64]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::4609:64af:8a4b:fd64%4]) with mapi id 15.20.9678.017; Fri, 6 Mar 2026 08:13:56 +0000 Message-ID: <74f86fec-0c56-4b48-a000-b46cdf61e651@nxp.com> Date: Fri, 6 Mar 2026 16:15:02 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 3/9] drm/bridge: fsl-ldb: Add support for i.MX94 To: Laurentiu Palcu , imx@lists.linux.dev, Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: dri-devel@lists.freedesktop.org, Frank Li , Luca Ceresoli , linux-kernel@vger.kernel.org References: <20260304-dcif-upstreaming-v8-0-bec5c047edd4@oss.nxp.com> <20260304-dcif-upstreaming-v8-3-bec5c047edd4@oss.nxp.com> From: Liu Ying Content-Language: en-US In-Reply-To: <20260304-dcif-upstreaming-v8-3-bec5c047edd4@oss.nxp.com> Content-Type: text/plain; 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> > struct fsl_ldb_devdata { > @@ -64,21 +65,31 @@ struct fsl_ldb_devdata { > u32 lvds_ctrl; > bool lvds_en_bit; > bool single_ctrl_reg; > + u32 max_clk_khz; > }; > > static const struct fsl_ldb_devdata fsl_ldb_devdata[] = { > [IMX6SX_LDB] = { > .ldb_ctrl = 0x18, > .single_ctrl_reg = true, > + .max_clk_khz = 80000, > }, > [IMX8MP_LDB] = { > .ldb_ctrl = 0x5c, > .lvds_ctrl = 0x128, > + .max_clk_khz = 80000, > }, > [IMX93_LDB] = { > .ldb_ctrl = 0x20, > .lvds_ctrl = 0x24, > .lvds_en_bit = true, > + .max_clk_khz = 80000, > + }, > + [IMX94_LDB] = { > + .ldb_ctrl = 0x04, > + .lvds_ctrl = 0x08, > + .lvds_en_bit = true, > + .max_clk_khz = 165000, i.MX943 TRM says "Four lanes output at up to 148.5 MHz pixel clock and LVDS clock" for the LVDS Transmitter PHY(LVDS Tx) module, so this should be 148500? > }, > }; > > @@ -275,7 +286,7 @@ fsl_ldb_mode_valid(struct drm_bridge *bridge, > { > struct fsl_ldb *fsl_ldb = to_fsl_ldb(bridge); > > - if (mode->clock > (fsl_ldb_is_dual(fsl_ldb) ? 160000 : 80000)) > + if (mode->clock > (fsl_ldb_is_dual(fsl_ldb) ? 2 : 1) * fsl_ldb->devdata->max_clk_khz) > return MODE_CLOCK_HIGH; > > return MODE_OK; > @@ -384,6 +395,8 @@ static const struct of_device_id fsl_ldb_match[] = { > .data = &fsl_ldb_devdata[IMX8MP_LDB], }, > { .compatible = "fsl,imx93-ldb", > .data = &fsl_ldb_devdata[IMX93_LDB], }, > + { .compatible = "fsl,imx94-ldb", > + .data = &fsl_ldb_devdata[IMX94_LDB], }, > { /* sentinel */ }, > }; > MODULE_DEVICE_TABLE(of, fsl_ldb_match); > -- Regards, Liu Ying