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From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
To: Brian Masney <bmasney@redhat.com>, Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Maxime Ripard <mripard@kernel.org>,
	Stephen Boyd <sboyd@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH 8/9] phy: rockchip: phy-rockchip-samsung-hdptx: convert from round_rate() to determine_rate()
Date: Mon, 14 Jul 2025 12:11:21 +0300	[thread overview]
Message-ID: <751975b2-c9dc-4f89-9537-475773b16883@collabora.com> (raw)
In-Reply-To: <20250710-phy-clk-round-rate-v1-8-0ff274055e42@redhat.com>

Hi Brian,

On 7/10/25 7:07 PM, Brian Masney wrote:
> The round_rate() clk ops is deprecated, so migrate this driver from
> round_rate() to determine_rate() using the Coccinelle semantic patch
> on the cover letter of this series.
> 
> Signed-off-by: Brian Masney <bmasney@redhat.com>
> ---
>  drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 21 +++++++++++++--------
>  1 file changed, 13 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
> index 79db57ee90d1487b51f4ddadde870a275dd7b17b..f027d2caa4c2ebfc0fdec08bcebf3f415ff1a064 100644
> --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
> +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
> @@ -1869,8 +1869,8 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(struct clk_hw *hw,
>  	return hdptx->hw_rate;
>  }
>  
> -static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
> -					unsigned long *parent_rate)
> +static int rk_hdptx_phy_clk_determine_rate(struct clk_hw *hw,
> +					   struct clk_rate_request *req)
>  {
>  	struct rk_hdptx_phy *hdptx = to_rk_hdptx_phy(hw);
>  
> @@ -1879,14 +1879,17 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
>  	 * To be dropped as soon as the RK DW HDMI QP bridge driver
>  	 * switches to make use of phy_configure().
>  	 */
> -	if (!hdptx->restrict_rate_change && rate != hdptx->hdmi_cfg.tmds_char_rate) {
> +	if (!hdptx->restrict_rate_change && req->rate != hdptx->hdmi_cfg.tmds_char_rate) {
>  		struct phy_configure_opts_hdmi hdmi = {
> -			.tmds_char_rate = rate,
> +			.tmds_char_rate = req->rate,
>  		};
>  		int ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &hdmi);
>  
> -		if (ret)
> -			return ret;
> +		if (ret) {
> +			req->rate = ret;

This is not quite right, since "ret" is expected to contain an error number,
typically -EINVAL.

> +
> +			return 0;

We shall continue returning the error code here.

Regards,
Cristian

> +		}
>  
>  		hdptx->hdmi_cfg = hdmi;
>  	}
> @@ -1896,7 +1899,9 @@ static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate,
>  	 * hence ensure rk_hdptx_phy_clk_set_rate() won't be invoked with
>  	 * a different rate argument.
>  	 */
> -	return hdptx->hdmi_cfg.tmds_char_rate;
> +	req->rate = hdptx->hdmi_cfg.tmds_char_rate;
> +
> +	return 0;
>  }
>  
>  static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate,
> @@ -1925,7 +1930,7 @@ static const struct clk_ops hdptx_phy_clk_ops = {
>  	.prepare = rk_hdptx_phy_clk_prepare,
>  	.unprepare = rk_hdptx_phy_clk_unprepare,
>  	.recalc_rate = rk_hdptx_phy_clk_recalc_rate,
> -	.round_rate = rk_hdptx_phy_clk_round_rate,
> +	.determine_rate = rk_hdptx_phy_clk_determine_rate,
>  	.set_rate = rk_hdptx_phy_clk_set_rate,
>  };
>  
> 

  reply	other threads:[~2025-07-14  9:11 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-10 16:07 [PATCH 0/9] phy: convert from clk " Brian Masney
2025-07-10 16:07 ` [PATCH 1/9] phy: freescale: phy-fsl-samsung-hdmi: convert from " Brian Masney
2025-07-10 16:07 ` [PATCH 2/9] phy: mediatek: phy-mtk-hdmi-mt2701: " Brian Masney
2025-07-10 16:07 ` [PATCH 3/9] phy: mediatek: phy-mtk-hdmi-mt8173: " Brian Masney
2025-07-10 16:07 ` [PATCH 4/9] phy: mediatek: phy-mtk-hdmi-mt8195: " Brian Masney
2025-07-10 16:07 ` [PATCH 5/9] phy: mediatek: phy-mtk-mipi-dsi-mt8173: " Brian Masney
2025-07-10 16:07 ` [PATCH 6/9] phy: mediatek: phy-mtk-mipi-dsi-mt8183: " Brian Masney
2025-07-10 16:07 ` [PATCH 7/9] phy: rockchip: phy-rockchip-inno-hdmi: " Brian Masney
2025-07-10 16:07 ` [PATCH 8/9] phy: rockchip: phy-rockchip-samsung-hdptx: " Brian Masney
2025-07-14  9:11   ` Cristian Ciocaltea [this message]
2025-07-10 16:07 ` [PATCH 9/9] phy: ti: phy-j721e-wiz: " Brian Masney

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