From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36A21439335 for ; Thu, 6 Aug 2026 10:52:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786013567; cv=none; b=i5dLKZjaP6L+RIZLoPnTY99AWo/GLOz9vmiL/2fCEPw4R3cAKzXkw3RnHCSonASbyWztzSvir+Gk0SkiQ5T8GTPtSZUaxDAenAHcKzVlEUyZP4bjm056LxTodYxByxVpVRS2oIlwfhuN+6McsvuQ5krLiAlEYra8bE7uJN9zPsE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786013567; c=relaxed/simple; bh=S14CCXsvZKcoB+hqjG0/+YwP1JERAdUsRwYB9FkJGyQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=I5KH7/tNddLtLsa8qkTBm2ixNpH8k1mIo/vzA3LpSFZWe3lZXP+cDiNVbhCCH+PvdhEuAEQPe1tmATmVYJAaYx9oEgOT+Rph22pP9CTUxilagHCKJ+hgD7yolW5dAtWEb8400DDBeihSWQhygFPg8+lou0/SWwr3//Vb6GfvXIk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=n0NCDN/y; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=LSZuO5/a; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="n0NCDN/y"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="LSZuO5/a" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6769ndHB1578698 for ; Thu, 6 Aug 2026 10:52:45 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= P9wCDFhEDVTTIuhNLpqSgqnjSFrcAIQqWwJdGdfxngk=; b=n0NCDN/y4q+yVtss WfR8OPnwOU4MQH4vqe+FwO0TUO/Af2unPwR53vW+Zm0FT+8Ku826Fo0YR1I5NSIN RZR7iTS7ew8/g1Hxjf3fsL8Ogd12xGLqssGg8/geL6G/iw4qFvmhguTeFvTZi0mb 7NpPEOf/L+W5TQ1x9w9nvmehOuHEtHKuZLMx5WZq7+lGkGU1GHv6I3uCGc3HlrSz EOXRkv0ZzbrkydWWxSg4O6Be3OBWde3ASFhL0KJxxMnmbDggItxS1ucn04rwZS7W B8TYJ1BBJaDdlFwh9ah9NKxz1J1ZqUKZ0ICQQPYFjH9sP0cOmEDSU+uyt8mEqBsM Mzhg6Q== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4fvju8hndw-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 06 Aug 2026 10:52:45 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-84885a4fcabso2413195b3a.3 for ; Thu, 06 Aug 2026 03:52:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1786013564; x=1786618364; darn=vger.kernel.org; h=content-transfer-encoding:content-type:in-reply-to:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:from:to:cc:subject:date:message-id:reply-to :content-type; bh=P9wCDFhEDVTTIuhNLpqSgqnjSFrcAIQqWwJdGdfxngk=; b=LSZuO5/amZE36TM/mmIp2cpELXlFAOa+7TbT2hZ6NwIowTYtY7tMevd0pcQA9U+31B ttMyEbEdPuw8JRVO6o071OPE6WxYAZmpcXxjHsGzLtJsJxXfaqmmv+mpxczEEdeXqtl6 dAH9OmDMx4LOAQazeXvFQ0cJMi+tRcdDCozdXOudL5S/HHDV/Nu+N50ASTNBzlzD1rj7 Pf15NLC9iioGp5HHoNEosIKqyK0ql9haYdsAvmP5QsINmgskZLZOa5p7jYO3OCeKm7ue iptuGdkK/RLtpt5RK0GLsKKyT0vBVYqM42gG6HDUMMc17HrIl2pafGtYPZ9ldXzdaFk/ urww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786013564; x=1786618364; h=content-transfer-encoding:content-type:in-reply-to:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to:content-type; bh=P9wCDFhEDVTTIuhNLpqSgqnjSFrcAIQqWwJdGdfxngk=; b=ljlXcP0nSjfgKPaiOefH+xEjzhKI95cGtBFrH03z+MgE4EFVaGRpMTP/QGazOKsdi5 CAYi2ViENjR1HL4z23zVbb7CBUsakRV6aM17aahsuGqf67oLPTKyNubZk6NRT6LFrsGW /psh/P2HhBcLSV9dxxymVV8OX1QCZztuLcDx8/4hjolFcnjJuvhSsswGhJdGQ4N7Xfaf 6MHQqhWX9hRSzLgOWCYsw3R0VDbeQrEIYBKRQz5O5EXsZ3LGxVoKjIEazBS15j+kAcp2 /yDS++2f04JNxC3yT1qpxrn5aJ4LUX7qQXBQa7smxx1K8YDk41PTjtK4MZD+XcxRiLRf rEkA== X-Forwarded-Encrypted: i=1; AHgh+RrCW3Vf5P7y6LZrYWcUVkbAbUMt5VjkD+bX882G1MXdgkt0dNUuLWyjXcVChxz79s1tlycrHcp5sXhhFXs=@vger.kernel.org X-Gm-Message-State: AOJu0Yw/MMfxFlcIa5V1Wgy8PwONBvQ9GQiFMARzf89hXH4SYVE9VfJN 5Hjik1TqVNmVdcEZXz3/ZD+rYGfkoNWXb9LOh0k83ycRBMpWFOldR1XcKs+JQVz8VJ5M3t8MMAA ZimcQdPNRDW5jKcAuhBUEr/meRfy35hJSme0Z3bw1udT1snmJKXU8iV2ucjk2CNOE0CM= X-Gm-Gg: AR+sD12jbe/OoEKorGGSQiuRa8haAotPRD/+6wpl+2YcxqRZILgmijIrRVJoYY0g5DE /8tfHW7C4enLcO/1ulplwslS/hGvxNyo8y1bJfDo8Myp23QUr29ugNigP5rMlJL4wtclP7Zci5z mGAnRnTxvUqW2gtcj5/iFcdnFl3KF1Oa0/KBjgscoETEDm5soTofPwiqyf5MjpGTP08dncVgO9Z LbI05cfcDPMlriCCZiy5v8Lnn9X3zKFiukb5lsJjE0koqkubySPXBYqV7dGTpwuUtdFSzedkvsb 9f+H8WoqhKFhwcwKkMIL43pUR25gdG10JsEEAcO109mOsLPQ7w01gYwyWc+dwF7y3Xj+S6+f+ke oh600fxHqQsa1voBOHyBQstWegpGTczxf X-Received: by 2002:a05:6a00:240d:b0:847:7a61:e68e with SMTP id d2e1a72fcca58-84f4febe965mr490062b3a.31.1786013564168; Thu, 06 Aug 2026 03:52:44 -0700 (PDT) X-Received: by 2002:a05:6a00:240d:b0:847:7a61:e68e with SMTP id d2e1a72fcca58-84f4febe965mr490026b3a.31.1786013563745; Thu, 06 Aug 2026 03:52:43 -0700 (PDT) Received: from [10.217.217.28] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-84f45bc9b32sm1179448b3a.58.2026.08.06.03.52.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Aug 2026 03:52:43 -0700 (PDT) Message-ID: <752aaae3-10bf-4714-bfef-e075ce30604c@oss.qualcomm.com> Date: Thu, 6 Aug 2026 16:22:35 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/7] thermal: qcom: qcom-spmi-adc-tm5-gen3: Add support for QCOM PMIC5 Gen4 ADC To: Jonathan Cameron Cc: David Lechner , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Bjorn Andersson , Konrad Dybcio , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, Kamal Wadhwa , Anjelique Melendez , Manaf Meethalavalappu Pallikunhi , Priyansh Jain References: <20260731-pmic5_gen4_adc-v1-0-9c49b2eea6f9@oss.qualcomm.com> <20260731-pmic5_gen4_adc-v1-3-9c49b2eea6f9@oss.qualcomm.com> <20260803011709.31cf83f2@jic23-huawei> Content-Language: en-US From: Jishnu Prakash In-Reply-To: <20260803011709.31cf83f2@jic23-huawei> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: ovMZ2udQNZ8WFunnO3tboCNNCj_dHc4t X-Proofpoint-ORIG-GUID: ovMZ2udQNZ8WFunnO3tboCNNCj_dHc4t X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODA2MDA4NSBTYWx0ZWRfX4mss6X/iKmC5 t7fJuAvTcP2o5TI6d7qfQ4AlBh9KRvahSx0rUT1DlhQ4faiP3uUrxz4A7gry1yP80WXyyImeHyh HZZYhVhi+jwPkoJkJXZxb5mRFKkRwKuVyZGDKfYFHr6FQJtWlojHn/BoP10pL1CPPhYlFYVSoVa XMXwtnzTuhnP6DCVlFBQ3YCtPDEFbRUQzwv4whhkyOaqy/uQ+sBwCUKYjL+YFB9VSfmNC3DUQ+x wlMKD+ask96dTQ853L8LIG7UAho3cDWvXTkooYkDyv3iQ8T6ryHz7CHVyqasIRe6CL4RXd93qJL jX+gF/g2p+jewrBQZzS+snLruNAfkUvRpMKcP5UMeZolzpQ6hOH3afMAvcx5iJSvnZo0MhdsmEh 0JmcnPbtA5ixK6tAOk1kBXDiVwOpy20umtFyCkuJRIJKTZmout+F602o7zT22x7lCQYBpg8wbi3 8r+ZD3gDoB6fHWnwWTQ== X-Authority-Analysis: v=2.4 cv=K5cS2SWI c=1 sm=1 tr=0 ts=6a74677d cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=VLISa07izfuZ2-VxH8gA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODA2MDA4NSBTYWx0ZWRfX1/QsmLPU/iel EgCzE3NCmfMXL9xFI8w6/WZegIEK+NGNU19MKBl82sdsZhbKMFzJwXX3pzM1Lh1ChLzOJQGHrRl wb84/v6icU3Uh5g1E4+5tG3Bw4MffIM= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-05_06,2026-08-05_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 spamscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608060085 Hi Jonathan, On 8/3/2026 5:47 AM, Jonathan Cameron wrote: > On Fri, 31 Jul 2026 23:36:16 +0530 > Jishnu Prakash wrote: > >> PMIC5 Gen4 ADC is similar to PMIC5 Gen3 ADC, with several changes made >> for improved performance, mostly at the hardware level. >> >> One significant software change is that ratiometric conversion resolution >> has been increased from 14 bits to 16 bits. Add a reverse scaling function >> for Gen4 ADC thermistor channels. >> >> In the latest PMIC arbiter version (v8), there can be up to 4 buses >> under the PMIC arbiter and 32 PMICs under each bus. In order to >> support communication between ADC on the master PMIC and ADCs on any >> of the other PMICs, a field of width 2 bits is added for bus index >> and the bits for SID are extended from 4 to 5 bits, in the SID >> register. Add support for this. >> >> Co-developed-by: Anjelique Melendez >> Signed-off-by: Anjelique Melendez >> Signed-off-by: Jishnu Prakash > Hi Jishnu, Anjelique > > Code looks fine, but I just wanted to check. What happens if > for some reason the patch before ends up in a tree and this one doesn't > Do we read the wrong temperatures given 'bus' isn't specified? > Actually from what I see, patches 2 and 3 need to go in together, else there would be a compilation error in one driver. This is because patch 2 replaces two macros, which are used in both the IIO and thermal drivers: ADC5_GEN3_SID_MASK -> ADC5_GEN4_SID_MASK ADC5_GEN3_V_CHAN -> ADC5_GEN4_V_CHAN It looks like I missed checking for bisectability, sorry about that. To avoid this, I'll add the new macros in patch 2 and remove the old ones in a separate new patch after patch 3. To answer your question once bisectability is fixed: The changes in this TM file affect the flow in the .set_trips() call, which is used for setting high/low temperature thresholds. The .get_temp() is not affected, as it directly calls into the main ADC driver using the exported function adc5_gen3_get_scaled_reading(). For the specific situation you mentioned - temperature reading for Gen4 channels using get_temp() would work correctly with patch 2 in place, but setting high/low thresholds would go wrong for all Gen4 channels as the conversion formula is different. Bus index not being specified would also cause errors for configuring channels on bus numbers other than 0. Thanks, Jishnu > Jonathan >