From: Marcos Del Sol Vives <marcos@orca.pet>
To: David Laight <david.laight.linux@gmail.com>,
Peter Zijlstra <peterz@infradead.org>
Cc: linux-kernel@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Brian Gerst <brgerst@gmail.com>, Uros Bizjak <ubizjak@gmail.com>,
Ard Biesheuvel <ardb@kernel.org>,
David Kaplan <david.kaplan@amd.com>,
"Ahmed S. Darwish" <darwi@linutronix.de>,
Kees Cook <kees@kernel.org>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Oleg Nesterov <oleg@redhat.com>, "Xin Li (Intel)" <xin@zytor.com>,
Sabyrzhan Tasbolatov <snovitoll@gmail.com>
Subject: Re: [PATCH] x86: add hintable NOPs emulation
Date: Thu, 21 Aug 2025 21:46:42 +0200 [thread overview]
Message-ID: <75439282-9895-4b17-b6fd-3f0222fa2f03@orca.pet> (raw)
In-Reply-To: <20250821194015.3c56964c@pumpkin>
El 21/08/2025 a las 20:40, David Laight escribió:
> On Thu, 21 Aug 2025 14:46:59 +0200
> Peter Zijlstra <peterz@infradead.org> wrote:
>> It would mean cloning the page as private. Yes you can do it, uprobes
>> has all the code for this. But it has non-trivial memory overhead.
>
> I was thinking it would be safe to do this change without cloning the page.
> After all the change is needed for all processes executing the code.
> That might only be easy on UP systems - but I doubt the affected CPU are SMP.
>
> David
>
Actually...
marcos@vdx3:~$ nproc
2
marcos@vdx3:~$ cat /proc/cpuinfo
processor : 0
vendor_id : Vortex86 SoC
cpu family : 6
model : 1
model name : Vortex86DX3
stepping : 1
cpu MHz : 1000.017
physical id : 0
siblings : 1
core id : 0
cpu cores : 1
apicid : 0
initial apicid : 0
fdiv_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu pse tsc msr cx8 apic sep pge cmov mmx fxsr sse cpuid
bugs : itlb_multihit
bogomips : 2000.03
clflush size : 32
cache_alignment : 32
address sizes : 32 bits physical, 32 bits virtual
power management:
processor : 1
vendor_id : Vortex86 SoC
cpu family : 6
model : 1
model name : Vortex86DX3
stepping : 1
cpu MHz : 1000.017
physical id : 1
siblings : 1
core id : 0
cpu cores : 1
apicid : 1
initial apicid : 1
fdiv_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 3
wp : yes
flags : fpu pse tsc msr cx8 apic sep pge cmov mmx fxsr sse cpuid
bugs : itlb_multihit
bogomips : 2000.03
clflush size : 32
cache_alignment : 32
address sizes : 32 bits physical, 32 bits virtual
power management:
Vortex SoCs are true oddballs, aren't they?
next prev parent reply other threads:[~2025-08-21 19:46 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-20 1:34 Marcos Del Sol Vives
2025-08-20 9:07 ` Peter Zijlstra
2025-08-21 12:28 ` David Laight
2025-08-21 12:46 ` Peter Zijlstra
2025-08-21 18:40 ` David Laight
2025-08-21 19:46 ` Marcos Del Sol Vives [this message]
2025-08-21 15:11 ` Marcos Del Sol Vives
2025-08-20 9:14 ` Ahmed S. Darwish
2025-08-20 9:33 ` Marcos Del Sol Vives
2025-08-20 9:43 ` Borislav Petkov
2025-08-20 9:51 ` Marcos Del Sol Vives
2025-08-20 9:55 ` Borislav Petkov
2025-08-20 10:01 ` Marcos Del Sol Vives
2025-08-20 10:08 ` Borislav Petkov
2025-08-20 10:21 ` Marcos Del Sol Vives
2025-08-20 10:30 ` Borislav Petkov
2025-08-21 2:00 ` Kees Cook
2025-08-20 10:11 ` Ahmed S. Darwish
2025-08-20 10:30 ` Ahmed S. Darwish
2025-08-21 1:43 ` H. Peter Anvin
2025-08-21 9:35 ` Marcos Del Sol Vives
2025-08-21 5:02 ` H. Peter Anvin
2025-08-21 12:26 ` David Laight
2025-08-21 12:48 ` Marcos Del Sol Vives
2025-08-21 12:48 ` Peter Zijlstra
2025-08-21 13:45 ` Marcos Del Sol Vives
2025-08-21 13:59 ` Peter Zijlstra
2025-08-22 22:12 ` H. Peter Anvin
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