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[87.21.228.106]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ada5dd045e2sm119258566b.90.2025.05.29.03.48.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 May 2025 03:48:02 -0700 (PDT) From: Andrea della Porta To: Andrea della Porta , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Lorenzo Pieralisi , Krzysztof Wilczynski , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn , Phil Elwell , Dave Stevenson , kernel-list@raspberrypi.com, Matthias Brugger Subject: [PATCH v10 3/5] dt-bindings: misc: Add device specific bindings for RaspberryPi RP1 Date: Thu, 29 May 2025 12:49:20 +0200 Message-ID: <7564a3bb528f3ca965e6e88b435aa8815fe0c2ea.1748514765.git.andrea.porta@suse.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The RP1 is a MFD that exposes its peripherals through PCI BARs. This schema is intended as minimal support for the clock generator and gpio controller peripherals which are accessible through BAR1. Signed-off-by: Andrea della Porta Reviewed-by: Rob Herring (Arm) Reviewed-by: Florian Fainelli --- .../devicetree/bindings/misc/pci1de4,1.yaml | 137 ++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/pci1de4,1.yaml diff --git a/Documentation/devicetree/bindings/misc/pci1de4,1.yaml b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml new file mode 100644 index 000000000000..2f9a7a554ed8 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/pci1de4,1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RaspberryPi RP1 MFD PCI device + +maintainers: + - A. della Porta + +description: + The RaspberryPi RP1 is a PCI multi function device containing + peripherals ranging from Ethernet to USB controller, I2C, SPI + and others. + The peripherals are accessed by addressing the PCI BAR1 region. + +allOf: + - $ref: /schemas/pci/pci-ep-bus.yaml + +properties: + compatible: + additionalItems: true + maxItems: 3 + items: + - const: pci1de4,1 + + '#interrupt-cells': + const: 2 + description: | + Specifies respectively the interrupt number and flags as defined + in include/dt-bindings/interrupt-controller/irq.h. + Since all interrupts are active high, only IRQ_TYPE_LEVEL_HIGH + and IRQ_TYPE_EDGE_RISING can be specified as type flags. + The supported values for the interrupt number are: + - IO BANK0: 0 + - IO BANK1: 1 + - IO BANK2: 2 + - AUDIO IN: 3 + - AUDIO OUT: 4 + - PWM0: 5 + - ETH: 6 + - I2C0: 7 + - I2C1: 8 + - I2C2: 9 + - I2C3: 10 + - I2C4: 11 + - I2C5: 12 + - I2C6: 13 + - I2S0: 14 + - I2S1: 15 + - I2S2: 16 + - SDIO0: 17 + - SDIO1: 18 + - SPI0: 19 + - SPI1: 20 + - SPI2: 21 + - SPI3: 22 + - SPI4: 23 + - SPI5: 24 + - UART0: 25 + - TIMER0: 26 + - TIMER1: 27 + - TIMER2: 28 + - TIMER3: 29 + - USB HOST0: 30 + - USB HOST0-0: 31 + - USB HOST0-1: 32 + - USB HOST0-2: 33 + - USB HOST0-3: 34 + - USB HOST1: 35 + - USB HOST1-0: 36 + - USB HOST1-1: 37 + - USB HOST1-2: 38 + - USB HOST1-3: 39 + - DMA: 40 + - PWM1: 41 + - UART1: 42 + - UART2: 43 + - UART3: 44 + - UART4: 45 + - UART5: 46 + - MIPI0: 47 + - MIPI1: 48 + - VIDEO OUT: 49 + - PIO0: 50 + - PIO1: 51 + - ADC FIFO: 52 + - PCIE OUT: 53 + - SPI6: 54 + - SPI7: 55 + - SPI8: 56 + - PROC MISC: 57 + - SYSCFG: 58 + - CLOCKS DEFAULT: 59 + - VBUSCTRL: 60 + + interrupt-controller: true + +unevaluatedProperties: false + +required: + - compatible + - '#interrupt-cells' + - interrupt-controller + - pci-ep-bus@1 + +examples: + - | + pci { + #address-cells = <3>; + #size-cells = <2>; + + rp1@0,0 { + compatible = "pci1de4,1"; + ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>; + #address-cells = <3>; + #size-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + pci_ep_bus: pci-ep-bus@1 { + compatible = "simple-bus"; + ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>; + dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>; + #address-cells = <2>; + #size-cells = <2>; + + rp1_clocks: clocks@40018000 { + compatible = "raspberrypi,rp1-clocks"; + reg = <0x00 0x40018000 0x0 0x10038>; + #clock-cells = <1>; + clocks = <&clk_rp1_xosc>; + }; + }; + }; + }; -- 2.35.3 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ed1-f66.google.com (mail-ed1-f66.google.com [209.85.208.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71E1528EA43 for ; Thu, 29 May 2025 11:22:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[87.21.228.106]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ada5d84e72csm124424366b.76.2025.05.29.04.22.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 May 2025 04:22:18 -0700 (PDT) From: Andrea della Porta To: Andrea della Porta , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Lorenzo Pieralisi , Krzysztof Wilczynski , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn , Phil Elwell , Dave Stevenson , kernel-list@raspberrypi.com, Matthias Brugger Subject: [PATCH v10 03/13] dt-bindings: misc: Add device specific bindings for RaspberryPi RP1 Date: Thu, 29 May 2025 13:23:38 +0200 Message-ID: <7564a3bb528f3ca965e6e88b435aa8815fe0c2ea.1748514765.git.andrea.porta@suse.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Message-ID: <20250529112338.x4GAzGxRGbIPIdKIV5ZZTDJKtr5Rv1lZNMlEig_ReuA@z> The RP1 is a MFD that exposes its peripherals through PCI BARs. This schema is intended as minimal support for the clock generator and gpio controller peripherals which are accessible through BAR1. Signed-off-by: Andrea della Porta Reviewed-by: Rob Herring (Arm) Reviewed-by: Florian Fainelli --- .../devicetree/bindings/misc/pci1de4,1.yaml | 137 ++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/pci1de4,1.yaml diff --git a/Documentation/devicetree/bindings/misc/pci1de4,1.yaml b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml new file mode 100644 index 000000000000..2f9a7a554ed8 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/pci1de4,1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RaspberryPi RP1 MFD PCI device + +maintainers: + - A. della Porta + +description: + The RaspberryPi RP1 is a PCI multi function device containing + peripherals ranging from Ethernet to USB controller, I2C, SPI + and others. + The peripherals are accessed by addressing the PCI BAR1 region. + +allOf: + - $ref: /schemas/pci/pci-ep-bus.yaml + +properties: + compatible: + additionalItems: true + maxItems: 3 + items: + - const: pci1de4,1 + + '#interrupt-cells': + const: 2 + description: | + Specifies respectively the interrupt number and flags as defined + in include/dt-bindings/interrupt-controller/irq.h. + Since all interrupts are active high, only IRQ_TYPE_LEVEL_HIGH + and IRQ_TYPE_EDGE_RISING can be specified as type flags. + The supported values for the interrupt number are: + - IO BANK0: 0 + - IO BANK1: 1 + - IO BANK2: 2 + - AUDIO IN: 3 + - AUDIO OUT: 4 + - PWM0: 5 + - ETH: 6 + - I2C0: 7 + - I2C1: 8 + - I2C2: 9 + - I2C3: 10 + - I2C4: 11 + - I2C5: 12 + - I2C6: 13 + - I2S0: 14 + - I2S1: 15 + - I2S2: 16 + - SDIO0: 17 + - SDIO1: 18 + - SPI0: 19 + - SPI1: 20 + - SPI2: 21 + - SPI3: 22 + - SPI4: 23 + - SPI5: 24 + - UART0: 25 + - TIMER0: 26 + - TIMER1: 27 + - TIMER2: 28 + - TIMER3: 29 + - USB HOST0: 30 + - USB HOST0-0: 31 + - USB HOST0-1: 32 + - USB HOST0-2: 33 + - USB HOST0-3: 34 + - USB HOST1: 35 + - USB HOST1-0: 36 + - USB HOST1-1: 37 + - USB HOST1-2: 38 + - USB HOST1-3: 39 + - DMA: 40 + - PWM1: 41 + - UART1: 42 + - UART2: 43 + - UART3: 44 + - UART4: 45 + - UART5: 46 + - MIPI0: 47 + - MIPI1: 48 + - VIDEO OUT: 49 + - PIO0: 50 + - PIO1: 51 + - ADC FIFO: 52 + - PCIE OUT: 53 + - SPI6: 54 + - SPI7: 55 + - SPI8: 56 + - PROC MISC: 57 + - SYSCFG: 58 + - CLOCKS DEFAULT: 59 + - VBUSCTRL: 60 + + interrupt-controller: true + +unevaluatedProperties: false + +required: + - compatible + - '#interrupt-cells' + - interrupt-controller + - pci-ep-bus@1 + +examples: + - | + pci { + #address-cells = <3>; + #size-cells = <2>; + + rp1@0,0 { + compatible = "pci1de4,1"; + ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>; + #address-cells = <3>; + #size-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + pci_ep_bus: pci-ep-bus@1 { + compatible = "simple-bus"; + ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>; + dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>; + #address-cells = <2>; + #size-cells = <2>; + + rp1_clocks: clocks@40018000 { + compatible = "raspberrypi,rp1-clocks"; + reg = <0x00 0x40018000 0x0 0x10038>; + #clock-cells = <1>; + clocks = <&clk_rp1_xosc>; + }; + }; + }; + }; -- 2.35.3 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ed1-f66.google.com (mail-ed1-f66.google.com [209.85.208.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D5852253B2 for ; Thu, 29 May 2025 12:42:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[87.21.228.106]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ada6ad395dfsm135973466b.127.2025.05.29.05.42.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 May 2025 05:42:32 -0700 (PDT) From: Andrea della Porta To: Andrea della Porta , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Lorenzo Pieralisi , Krzysztof Wilczynski , Manivannan Sadhasivam , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn , Phil Elwell , Dave Stevenson , kernel-list@raspberrypi.com, Matthias Brugger Subject: [PATCH v11 03/13] dt-bindings: misc: Add device specific bindings for RaspberryPi RP1 Date: Thu, 29 May 2025 14:43:52 +0200 Message-ID: <7564a3bb528f3ca965e6e88b435aa8815fe0c2ea.1748514765.git.andrea.porta@suse.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Message-ID: <20250529124352.GiUPNYEyE3Qgv9agqEEd9MgB72F58SxmuNL0xSQ7YGU@z> The RP1 is a MFD that exposes its peripherals through PCI BARs. This schema is intended as minimal support for the clock generator and gpio controller peripherals which are accessible through BAR1. Signed-off-by: Andrea della Porta Reviewed-by: Rob Herring (Arm) Reviewed-by: Florian Fainelli --- .../devicetree/bindings/misc/pci1de4,1.yaml | 137 ++++++++++++++++++ 1 file changed, 137 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/pci1de4,1.yaml diff --git a/Documentation/devicetree/bindings/misc/pci1de4,1.yaml b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml new file mode 100644 index 000000000000..2f9a7a554ed8 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/pci1de4,1.yaml @@ -0,0 +1,137 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/pci1de4,1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RaspberryPi RP1 MFD PCI device + +maintainers: + - A. della Porta + +description: + The RaspberryPi RP1 is a PCI multi function device containing + peripherals ranging from Ethernet to USB controller, I2C, SPI + and others. + The peripherals are accessed by addressing the PCI BAR1 region. + +allOf: + - $ref: /schemas/pci/pci-ep-bus.yaml + +properties: + compatible: + additionalItems: true + maxItems: 3 + items: + - const: pci1de4,1 + + '#interrupt-cells': + const: 2 + description: | + Specifies respectively the interrupt number and flags as defined + in include/dt-bindings/interrupt-controller/irq.h. + Since all interrupts are active high, only IRQ_TYPE_LEVEL_HIGH + and IRQ_TYPE_EDGE_RISING can be specified as type flags. + The supported values for the interrupt number are: + - IO BANK0: 0 + - IO BANK1: 1 + - IO BANK2: 2 + - AUDIO IN: 3 + - AUDIO OUT: 4 + - PWM0: 5 + - ETH: 6 + - I2C0: 7 + - I2C1: 8 + - I2C2: 9 + - I2C3: 10 + - I2C4: 11 + - I2C5: 12 + - I2C6: 13 + - I2S0: 14 + - I2S1: 15 + - I2S2: 16 + - SDIO0: 17 + - SDIO1: 18 + - SPI0: 19 + - SPI1: 20 + - SPI2: 21 + - SPI3: 22 + - SPI4: 23 + - SPI5: 24 + - UART0: 25 + - TIMER0: 26 + - TIMER1: 27 + - TIMER2: 28 + - TIMER3: 29 + - USB HOST0: 30 + - USB HOST0-0: 31 + - USB HOST0-1: 32 + - USB HOST0-2: 33 + - USB HOST0-3: 34 + - USB HOST1: 35 + - USB HOST1-0: 36 + - USB HOST1-1: 37 + - USB HOST1-2: 38 + - USB HOST1-3: 39 + - DMA: 40 + - PWM1: 41 + - UART1: 42 + - UART2: 43 + - UART3: 44 + - UART4: 45 + - UART5: 46 + - MIPI0: 47 + - MIPI1: 48 + - VIDEO OUT: 49 + - PIO0: 50 + - PIO1: 51 + - ADC FIFO: 52 + - PCIE OUT: 53 + - SPI6: 54 + - SPI7: 55 + - SPI8: 56 + - PROC MISC: 57 + - SYSCFG: 58 + - CLOCKS DEFAULT: 59 + - VBUSCTRL: 60 + + interrupt-controller: true + +unevaluatedProperties: false + +required: + - compatible + - '#interrupt-cells' + - interrupt-controller + - pci-ep-bus@1 + +examples: + - | + pci { + #address-cells = <3>; + #size-cells = <2>; + + rp1@0,0 { + compatible = "pci1de4,1"; + ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>; + #address-cells = <3>; + #size-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + pci_ep_bus: pci-ep-bus@1 { + compatible = "simple-bus"; + ranges = <0x00 0x40000000 0x01 0x00 0x00000000 0x00 0x00400000>; + dma-ranges = <0x10 0x00000000 0x43000000 0x10 0x00000000 0x10 0x00000000>; + #address-cells = <2>; + #size-cells = <2>; + + rp1_clocks: clocks@40018000 { + compatible = "raspberrypi,rp1-clocks"; + reg = <0x00 0x40018000 0x0 0x10038>; + #clock-cells = <1>; + clocks = <&clk_rp1_xosc>; + }; + }; + }; + }; -- 2.35.3