From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B68F23A7829; Fri, 12 Jun 2026 21:02:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781298140; cv=none; b=SUqwr43pIYTfZbsN3BNziNMLP5inTXYbhuWRDlGEyvsoXYbUwatCuvV0DfAKUKL3I7M26LqevlHnbQj2fvG+hg3gPWYaF0f1NWU5qKHguuVMl2Mj75Mxjpgwu7+GLJPnInjEEyDzrKuoltT4RCRwy6pKcc1p2dEoy/8owBPYZ9M= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781298140; c=relaxed/simple; bh=PQGqjTn8WOwaFfIFbyN4m+XOlTjk1+QHwU+EbuMPJNQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ibDOxjsGdTM6hHf2vQlyf1KOajyza2EHsQpx5Q2s2mdeKYLQ6KRtDiTqBEJx3WvatYVI4hwpbg78dNRtkdVkWA96T6+D/XVIPXH8KhCbubfhGMuwmtkci25cbt7qD+lDaXEuzf2L9pojc+4jl+xhNfx11xHvJyfQmjUaiTPtHrc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=C/3fB9dm; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="C/3fB9dm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1781298139; x=1812834139; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PQGqjTn8WOwaFfIFbyN4m+XOlTjk1+QHwU+EbuMPJNQ=; b=C/3fB9dmv+6MXBY2pltyeqzWAUmHsfb0xsP7nVYsAgKP3vFw7tonmZby WUx+DrjBtwKJW5PJH+grkzpgEfkaeJiC7YjwkFzFqwOdXDzevRyOwRgca upx0qy/b7FHVmHjeQGf03tKIh8He7uB4xVH4BGKhPJtoT1wxCmcMuGxNo HA+7XD+GcWOBPIzMWUkvbnAk1fPrJtG2ZPhHgkD0Gj0d/7P7XSitbTUVL iv7iCVCdMCcAH1XrKq9FlsfLsyb5f5QYom4rAJ+F5JhhhWABTWxZrYSP/ MLQBpMEcA5/ElblWBy5QOjccQOaJHxozEgEvrvLbROeGHr/BCAaDOnGqx g==; X-CSE-ConnectionGUID: YidymXkkTReJ3kwCty6JHA== X-CSE-MsgGUID: T5hzvP/0S3OHn+NE6jJS0w== X-IronPort-AV: E=McAfee;i="6800,10657,11815"; a="86038004" X-IronPort-AV: E=Sophos;i="6.24,201,1774335600"; d="scan'208";a="86038004" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jun 2026 14:02:13 -0700 X-CSE-ConnectionGUID: FcNZuXiGSFStAMTdTW+WAA== X-CSE-MsgGUID: v/d+hMmGR3qd5tH8BYZGPw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,201,1774335600"; d="scan'208";a="250832869" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jun 2026 14:02:12 -0700 From: "David E. Box" To: hansg@kernel.org, ilpo.jarvinen@linux.intel.com, irenic.rajneesh@gmail.com Cc: "David E. Box" , linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, srinivas.pandruvada@linux.intel.com, xi.pardee@linux.intel.com Subject: [PATCH v8 11/15] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper Date: Fri, 12 Jun 2026 14:01:52 -0700 Message-ID: <75ca738c88729f37f286f342c1fe8ff86f7eafe7.1781294741.git.david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Move DEVID/PWRMBASE extraction into pmc_ssram_get_devid_pwrmbase(). This is a preparatory refactor to place functionality in a common helper for reuse by a subsequent patch. Additionally add missing bits.h include and define SSRAM_BASE_ADDR_MASK for the address extraction mask. Signed-off-by: David E. Box Reviewed-by: Ilpo J=C3=A4rvinen --- V8 - No changes V7 - No changes V6 - No changes V5 - No changes V4 - No changes V3 - No changes V2 changes: - Added missing include for GENMASK_ULL() used in get_base= () - Defined SSRAM_BASE_ADDR_MASK macro to replace magic mask constant GENMASK_ULL(63, 3) .../platform/x86/intel/pmc/ssram_telemetry.c | 33 ++++++++++++------- 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 05f213aa108f..211d842df449 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -5,6 +5,7 @@ * Copyright (c) 2023, Intel Corporation. */ =20 +#include #include #include #include @@ -22,6 +23,7 @@ #define SSRAM_PCH_OFFSET 0x60 #define SSRAM_IOE_OFFSET 0x68 #define SSRAM_DEVID_OFFSET 0x70 +#define SSRAM_BASE_ADDR_MASK GENMASK_ULL(63, 3) =20 DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_= T)) =20 @@ -40,6 +42,23 @@ static const struct ssram_type pci_main =3D { static struct pmc_ssram_telemetry *pmc_ssram_telems; static bool device_probed; =20 +static inline u64 get_base(void __iomem *addr, u32 offset) +{ + return lo_hi_readq(addr + offset) & SSRAM_BASE_ADDR_MASK; +} + +static void pmc_ssram_get_devid_pwrmbase(void __iomem *ssram, unsigned int= pmc_idx) +{ + u64 pwrm_base; + u16 devid; + + pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); + devid =3D readw(ssram + SSRAM_DEVID_OFFSET); + + pmc_ssram_telems[pmc_idx].devid =3D devid; + pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; +} + static int pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 ssram_base, void _= _iomem *ssram) { @@ -76,18 +95,12 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64= ssram_base, void __iomem return intel_vsec_register(&pcidev->dev, &info); } =20 -static inline u64 get_base(void __iomem *addr, u32 offset) -{ - return lo_hi_readq(addr + offset) & GENMASK_ULL(63, 3); -} - static int pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev, unsigned int pmc_i= dx, u32 offset) { void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D NULL; void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D NULL; - u64 ssram_base, pwrm_base; - u16 devid; + u64 ssram_base; =20 ssram_base =3D pci_resource_start(pcidev, 0); tmp_ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); @@ -112,11 +125,7 @@ pmc_ssram_telemetry_get_pmc_pci(struct pci_dev *pcidev= , unsigned int pmc_idx, u3 ssram =3D no_free_ptr(tmp_ssram); } =20 - pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); - devid =3D readw(ssram + SSRAM_DEVID_OFFSET); - - pmc_ssram_telems[pmc_idx].devid =3D devid; - pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; + pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); =20 /* Find and register and PMC telemetry entries */ return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); --=20 2.43.0