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From: matthew.gerlach@linux.intel.com
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: lpieralisi@kernel.org, kw@linux.com,
	manivannan.sadhasivam@linaro.org,  robh@kernel.org,
	bhelgaas@google.com, krzk+dt@kernel.org,  conor+dt@kernel.org,
	dinguyen@kernel.org, joyce.ooi@intel.com,
	 linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org, matthew.gerlach@altera.com,
	 peter.colberg@altera.com
Subject: Re: [PATCH v7 3/7] arm64: dts: agilex: Fix fixed-clock schema warnings
Date: Wed, 19 Feb 2025 15:53:25 -0800 (PST)	[thread overview]
Message-ID: <75f74b7d-659-7c51-9ee5-6cb7b1bafeac@linux.intel.com> (raw)
In-Reply-To: <c5755f14-3efd-d4ef-4e34-6446608dedfd@linux.intel.com>



On Tue, 18 Feb 2025, matthew.gerlach@linux.intel.com wrote:

>
>
> On Sun, 16 Feb 2025, Krzysztof Kozlowski wrote:
>
>> On Sat, Feb 15, 2025 at 09:53:55AM -0600, Matthew Gerlach wrote:
>>> All Agilex SoCs have the fixed-clocks defined in socfpga_agilex.dsti,
>> 
>> 
>> That's not what I asked / talked about. If the clocks are in SoC, they
>> cannot be disabled.
>
> There are two clocks, cb_intoosc_hs_div2_clk and cb_intosc_ls_clk, in the SoC 
> with a known frequency. These warnings can be fixed in the DTSI.
>
>> 
>> If they clocks are not in SoC, they should not be in DTSI.
>
> The two clocks, f2s_free_clk and osc1, are not in the SoC; so they should be 
> removed from DTSI.

Since these clock changes are not directly related to adding PCIe Root 
Port support to Agilex chips, I think they should be in their patch set.

Matthew Gerlach

>
>> 
>> These were my statements last time and this patch does not comple.
>> Commit msg does not explain why this should be done differently.
>> 
>> Best regards,
>> Krzysztof
>> 
>> 
>
> Thanks for the feedback,
> Matthew Gerlach
>

  reply	other threads:[~2025-02-19 23:53 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-15 15:53 [PATCH v7 0/7] Add PCIe Root Port support for Agilex family of chips Matthew Gerlach
2025-02-15 15:53 ` [PATCH v7 1/7] dt-bindings: PCI: altera: Add binding for Agilex Matthew Gerlach
2025-02-15 15:53 ` [PATCH v7 2/7] dt-bindings: intel: document Agilex PCIe Root Port Matthew Gerlach
2025-02-16 11:56   ` Krzysztof Kozlowski
2025-02-17 15:47     ` matthew.gerlach
2025-02-18  7:25       ` Krzysztof Kozlowski
2025-02-18 22:51         ` matthew.gerlach
2025-02-15 15:53 ` [PATCH v7 3/7] arm64: dts: agilex: Fix fixed-clock schema warnings Matthew Gerlach
2025-02-16 11:58   ` Krzysztof Kozlowski
2025-02-18 21:44     ` matthew.gerlach
2025-02-19 23:53       ` matthew.gerlach [this message]
2025-02-15 15:53 ` [PATCH v7 4/7] arm64: dts: agilex: move bus@80000000 to socfpga_agilex.dtsi Matthew Gerlach
2025-02-15 15:53 ` [PATCH v7 5/7] arm64: dts: agilex: add dtsi for PCIe Root Port Matthew Gerlach
2025-02-15 15:53 ` [PATCH v7 6/7] arm64: dts: agilex: add dts enabling " Matthew Gerlach
2025-02-16 12:00   ` Krzysztof Kozlowski
2025-02-18 22:40     ` matthew.gerlach
2025-02-15 15:53 ` [PATCH v7 7/7] PCI: altera: Add Agilex support Matthew Gerlach

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