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Wed, 15 Apr 2026 14:17:52 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , Subject: [PATCH rc v2 2/5] iommu/arm-smmu-v3: Implement is_attach_deferred() for kdump Date: Wed, 15 Apr 2026 14:17:37 -0700 Message-ID: <7637d66c0f6c1fb16da4b5c9c4cec71752cf4d23.1776286352.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0FE:EE_|PH8PR12MB6939:EE_ X-MS-Office365-Filtering-Correlation-Id: 8c815406-5013-4352-c403-08de9b348257 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|36860700016|82310400026|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: NQ3yJVR1TrjJRgs1XfKRmXJRUrh89ft9yRtZ14iEx0rhf2yNs2+ktaJpvLprCfryHcwlwBrc+xtiQRETweKEZibXeDCiOZZLVM3HG/0T5VbZwYD3gPZJXhBftILtABdq+B0rrhNbi7x4+33z6Q2k2tWEz2nc4CVmpi+PZhA6wIXHyGEp4L1kh3qW3CiawRevLSyg0h7QCof3qFNI9FWaIZJFPvX7YiD1LIPrMPq6P4ewDcmwUzELCwtlboey705GL+hsmJCRiYLG44dCRoopH+3CUkH40ok+nTC+RWQRCZbW8X9b46SM/BGjyD8agg6QAiN1O3qC5uAi6AIN0ECDxXxUdNsW1HJ/j8YmkiRxems17s89cP40KV/kCbGQnZY6f/EwYF15z2wiImcQ5vy+C9cYKUyMiQaVulDOresqQfqekTmqrbmWDxgpYUsEIAavXOFSxTa1a+fFBClxa4uVhdcSYZ1snqGKXysDsDuPdPc6yt2OcOrh1IPuK/XIbZhHELAc1fVxtMgTnUYdeL9crgzv5SOeJc2fmWjVSxDIvavAxyebtoEC9msCZ/evVvXwVB+AZdQ4xdqrE5KdU/Nh6d+D5SMYTm/BD9/xL0a+jVgXaUiAcBwReJ8Z6fas+B9pSXZaME95pwcQmjpov84IRSrpvijjldXOCvqBvLncH2RN2R5R214tXu6FpZ6y/sYrk5NjlVRN56Obv8m/UtGVls1AFg1AgqyGf6u7qUdtUn6zD8pOJRQ6qiPM3tNjPuvGcdeOZid344nGqC7Qx67gkQ== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(36860700016)(82310400026)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: nycnXApbwFYH78FegydzRePgO0QMVM5i+QzwRRUII7xDHg/7q/9Jee2mDGgRNbCmW3JUhmFH7Ix/WMXqclQLNsK6VkyVXYHAjtLF9UpkfKvpYEfDTbQtapyYCmCOxmdl+g8BGwbRv1ZJ23fORWYVtAlDTzpSIsMom1Gwwsi/Ca8QGToGxHsr7Y+xn346/qa0t6kKZZYzJf3UhGezFqCLytrfCMLxEav7Vyq5Qj2TOqe2IVTQnFITDxBPWYMiVuLmm2nbuWswoSP78QnNlvFiThCgB7YabjmJh+JABesoMjSguiJ6FhEvrOOgfuJ6XpLMOgRxofklmPL3cLA6Mfo4HlGDqiTRbjGXVthYjb1zBg5ziwGAdaKVVKhLG2G0xqauyM8iswlUC1xP90XUZ6c8YJVdMcBGxVoEhTOXUIxeT2VUlj26sO8QVP3WgpuVlHJb X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Apr 2026 21:18:15.8690 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8c815406-5013-4352-c403-08de9b348257 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6939 Though the kdump kernel adopts the crashed kernel's stream table, the iommu core will still try to attach each probed device to a default domain, which overwrites the adopted STE and breaks in-flight DMA from that device. Implement an is_attach_deferred() callback to prevent this. For each device that has STE.V=1 in the adopted table, defer the default domain attachment, until the device driver explicitly requests it. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 28 +++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 9a45f17200a21..d9d543eb8cecf 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4212,6 +4212,33 @@ static void arm_smmu_remove_master(struct arm_smmu_master *master) kfree(master->build_invs); } +static bool arm_smmu_is_attach_deferred(struct device *dev) +{ + struct arm_smmu_master *master = dev_iommu_priv_get(dev); + struct arm_smmu_device *smmu = master->smmu; + int i; + + if (!(smmu->options & ARM_SMMU_OPT_KDUMP)) + return false; + + for (i = 0; i < master->num_streams; i++) { + u32 sid = master->streams[i].id; + struct arm_smmu_ste *step; + + /* Guard against unpopulated L2 entries in the adopted table */ + if ((smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) && + !smmu->strtab_cfg.l2.l2ptrs[arm_smmu_strtab_l1_idx(sid)]) + continue; + + step = arm_smmu_get_step_for_sid(smmu, sid); + /* If the STE has the Valid bit set, defer the attach */ + if (le64_to_cpu(step->data[0]) & STRTAB_STE_0_V) + return true; + } + + return false; +} + static struct iommu_device *arm_smmu_probe_device(struct device *dev) { int ret; @@ -4374,6 +4401,7 @@ static const struct iommu_ops arm_smmu_ops = { .hw_info = arm_smmu_hw_info, .domain_alloc_sva = arm_smmu_sva_domain_alloc, .domain_alloc_paging_flags = arm_smmu_domain_alloc_paging_flags, + .is_attach_deferred = arm_smmu_is_attach_deferred, .probe_device = arm_smmu_probe_device, .release_device = arm_smmu_release_device, .device_group = arm_smmu_device_group, -- 2.43.0