From: Florian Fainelli <f.fainelli@gmail.com>
To: Will Deacon <will.deacon@arm.com>
Cc: linux-kernel@vger.kernel.org,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
"moderated list:ARM PMU PROFILING AND DEBUGGING"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] perf vendor events arm64: Add Cortex-A72 events
Date: Tue, 9 Apr 2019 07:30:48 -0700 [thread overview]
Message-ID: <7771bb01-30a1-4b52-b887-1d6651085c85@gmail.com> (raw)
In-Reply-To: <20190408164733.GC7872@fuggles.cambridge.arm.com>
On 4/8/2019 9:47 AM, Will Deacon wrote:
> Hi Florian,
>
> On Sun, Apr 07, 2019 at 02:34:22PM -0700, Florian Fainelli wrote:
>> The Cortex-A72 supports all ARMv8 recommended events up to the
>> RC_ST_SPEC (0x91) event, create an appropriate JSON file for mapping
>> those events and update the mapfile.csv for matching the Cortex-A72 MIDR
>> to that file.
>>
>> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
>> ---
>> .../arm64/arm/cortex-a72/core-imp-def.json | 206 ++++++++++++++++++
>> tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
>> 2 files changed, 207 insertions(+)
>> create mode 100644 tools/perf/pmu-events/arch/arm64/arm/cortex-a72/core-imp-def.json
>
> It would be worth checking how many of these events are common between a57
> and a72, as they may be able to share much of the json file.
Makes sense, will check the Cortex-A57 TRM and re-submit accordingly.
Thanks!
--
Florian
next prev parent reply other threads:[~2019-04-09 14:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-07 21:34 Florian Fainelli
2019-04-08 16:47 ` Will Deacon
2019-04-09 14:30 ` Florian Fainelli [this message]
2019-04-11 13:01 ` John Garry
2019-05-02 21:41 ` Florian Fainelli
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