From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932911AbdABLaf (ORCPT ); Mon, 2 Jan 2017 06:30:35 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:25223 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932236AbdABLac (ORCPT ); Mon, 2 Jan 2017 06:30:32 -0500 Subject: Re: [PATCH v7 5/5] ARM: dts: da850: specify the maximum pixel clock rate for tilcdc To: Bartosz Golaszewski , Jyri Sarha , Tomi Valkeinen , David Airlie , Kevin Hilman , Michael Turquette , Rob Herring , Frank Rowand , Mark Rutland , Laurent Pinchart , Peter Ujfalusi , Russell King , Maxime Ripard References: <1481623759-12786-1-git-send-email-bgolaszewski@baylibre.com> <1481623759-12786-6-git-send-email-bgolaszewski@baylibre.com> CC: LKML , arm-soc , linux-drm , linux-devicetree From: Sekhar Nori Message-ID: <778cfd63-823c-7bf6-dc9d-0f2dcb43e129@ti.com> Date: Mon, 2 Jan 2017 16:59:35 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-Version: 1.0 In-Reply-To: <1481623759-12786-6-git-send-email-bgolaszewski@baylibre.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 13 December 2016 03:39 PM, Bartosz Golaszewski wrote: > At maximum CPU frequency of 300 MHz the maximum pixel clock frequency > is 37.5 MHz[1]. We must filter out any mode for which the calculated > pixel clock rate would exceed this value. > > Specify the max-pixelclock property for the display node for > da850-lcdk. > > [1] http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_LCD_Controller_(LCDC)_Throughput_and_Optimization_Techniques This wiki page is not really a TI datasheet and can change without notice. I changed this to refer to http://www.ti.com/lit/ds/symlink/am1808.pdf (SPRS653E, revised March 2014), table 6-110. Applied to v4.11/dt Thanks, Sekhar