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Tue, 13 Oct 2026 13:33:35 -0500 Message-ID: <77c7e02e-9cf8-efa1-0734-b702ec36c85c@amd.com> Date: Tue, 13 Oct 2026 11:33:41 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH V4 10/19] accel/amdxdna: Refactor AIE4 hardware initialization sequence Content-Language: en-US To: David Zhang , , , , , , CC: , References: <20261009225343.3079074-1-yidong.zhang@amd.com> <20261009225343.3079074-11-yidong.zhang@amd.com> From: Lizhi Hou In-Reply-To: <20261009225343.3079074-11-yidong.zhang@amd.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002319:EE_|LV3PR12MB9187:EE_ X-MS-Office365-Filtering-Correlation-Id: 331437bb-e950-4856-dbc2-08df2958822d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700016|23010399003|6133799003|22082099003|18002099003|10067099003|3023799007|4143699003|11063799006|261009223027099003|56012099006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5X1pxSzckuKLhn86rwATsaCQA2UL9NMgpnOFimra4aFhJtSfCw16bNrlBHvLHS9houQWWxhR9IMmJTqMaYmiK+eBa4OEUcjZfdMbp6QSk9BeRbjRSmJIbwgxCDE/FcwHWwzjrAFNGS/7f137+sDTxFx5tJaYUsihV4DrJG6CUSHp0fOuPp79TahWNV/rmV/Ej1NCvAdZvMNS5rwYzNFxHGweWz/ur3uUDeovCnp2QZhfvQEP1udvxfEZEpd+OP4yvHXIwo79lfIhfm/d/8Wq5OVg5Exegoa5XldQ3a3KXaO/9Biqv5HyCtB3/nSQ7ZtYA63Gd5hQUtqpL3GrCDwP9lFr/wPN2fQiux9AREse6lWOIV6CuAjtq5xTj6oUF4Ye9HHx9G4ARNhTj/0xzOTk3H+2qBEoqDgA4VBRxvTf50JDScgpb+LwWzBTTjUmebUc X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2026 18:33:42.6543 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 331437bb-e950-4856-dbc2-08df2958822d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002319.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR12MB9187 On 10/9/26 15:53, David Zhang wrote: > Reorganize AIE4 hardware initialization into distinct phases, next to > the existing aie4_config_fw(): > - aie4_query_fw(): Query NPU and CERT firmware versions. > - aie4_setup_aie(): Query AIE version, metadata, initialize DPM frequency > table, and initialize partitions. > > Update aie4_pf_hw_start(), aie4_vf_hw_start(), and aie4_classic_hw_start() > to use these phases and unify error unwinding labels. As part of this, > aie4_pf_hw_start() now also calls aie4_query_fw(), which it previously > did not do. > > Signed-off-by: David Zhang > --- > drivers/accel/amdxdna/aie4_pci.c | 79 +++++++++++++++++++------------- > 1 file changed, 46 insertions(+), 33 deletions(-) > > diff --git a/drivers/accel/amdxdna/aie4_pci.c b/drivers/accel/amdxdna/aie4_pci.c > index 446ab2f47c7d..ffe78c0c4e8b 100644 > --- a/drivers/accel/amdxdna/aie4_pci.c > +++ b/drivers/accel/amdxdna/aie4_pci.c > @@ -50,7 +50,7 @@ static int aie4_fw_is_alive(struct amdxdna_dev *xdna) > { > const struct amdxdna_dev_priv *npriv = xdna->dev_info->dev_priv; > struct amdxdna_dev_hdl *ndev = xdna->dev_handle; > - u32 __iomem *src; > + void __iomem *src; > u32 fw_is_valid; > int ret; > > @@ -280,7 +280,8 @@ static void aie4_partition_fini(struct amdxdna_dev_hdl *ndev) > XDNA_ERR(xdna, "partition fini failed: %d", ret); > } > > -static int aie4_query(struct amdxdna_dev_hdl *ndev) > +/* Verify CERT protocol compatibility before starting hardware. */ > +static int aie4_query_fw(struct amdxdna_dev_hdl *ndev) > { > struct amdxdna_dev *xdna = ndev->aie.xdna; > int ret; > @@ -293,25 +294,6 @@ static int aie4_query(struct amdxdna_dev_hdl *ndev) > if (ret) > return ret; > > - ret = aie4_query_aie_version(ndev, &ndev->aie.version); > - if (ret) > - return ret; > - > - ret = aie4_query_aie_metadata(ndev, &ndev->aie.metadata); > - if (ret) > - return ret; > - > - ndev->total_col = min_t(u32, AIE4_TOTAL_COLUMN, ndev->aie.metadata.cols); > - > - ret = aie4_init_dpm_freq_table(ndev); > - if (ret) { > - if (ret == -ETIME) > - return ret; > - /* if query dpm from fw failed, using default value */ > - if (ndev->priv->hw_ops && ndev->priv->hw_ops->set_dpm) > - (void)ndev->priv->hw_ops->set_dpm(&ndev->aie, 0); > - } > - > return 0; > } > > @@ -340,6 +322,32 @@ static int aie4_config_fw(struct amdxdna_dev_hdl *ndev) > return 0; > } > > +static int aie4_setup_aie(struct amdxdna_dev_hdl *ndev) > +{ > + int ret; > + > + ret = aie4_query_aie_version(ndev, &ndev->aie.version); > + if (ret) > + return ret; > + > + ret = aie4_query_aie_metadata(ndev, &ndev->aie.metadata); > + if (ret) > + return ret; > + > + ndev->total_col = min_t(u32, AIE4_TOTAL_COLUMN, ndev->aie.metadata.cols); > + > + ret = aie4_init_dpm_freq_table(ndev); > + if (ret) { > + if (ret == -ETIME) > + return ret; > + /* if query dpm from fw failed, using default value */ > + if (ndev->priv->hw_ops && ndev->priv->hw_ops->set_dpm) > + (void)ndev->priv->hw_ops->set_dpm(&ndev->aie, 0); > + } > + > + return aie4_partition_init(ndev); > +} > + > static int aie4_pf_hw_start(struct amdxdna_dev_hdl *ndev) > { > int ret; > @@ -352,6 +360,10 @@ static int aie4_pf_hw_start(struct amdxdna_dev_hdl *ndev) > if (ret) > goto stop_fw; > > + ret = aie4_query_fw(ndev); > + if (ret) > + goto mbox_fini; > + > ret = aie4_config_fw(ndev); > if (ret) > goto mbox_fini; > @@ -389,13 +401,13 @@ static int aie4_vf_hw_start(struct amdxdna_dev_hdl *ndev) > if (ret) > return ret; > > - ret = aie4_query(ndev); > + ret = aie4_query_fw(ndev); > if (ret) > - goto mailbox_fini; > + goto mbox_fini; > > - ret = aie4_partition_init(ndev); > + ret = aie4_setup_aie(ndev); > if (ret) > - goto mailbox_fini; > + goto mbox_fini; > > ret = aie4_restore_power_mode(ndev); > if (ret) > @@ -405,7 +417,7 @@ static int aie4_vf_hw_start(struct amdxdna_dev_hdl *ndev) > > partition_fini: > aie4_partition_fini(ndev); > -mailbox_fini: > +mbox_fini: > aie4_mailbox_fini(ndev); > return ret; > } > @@ -432,17 +444,17 @@ static int aie4_classic_hw_start(struct amdxdna_dev_hdl *ndev) > if (ret) > goto stop_fw; > > - ret = aie4_query(ndev); > + ret = aie4_query_fw(ndev); > if (ret) > - goto mailbox_fini; > + goto mbox_fini; > > ret = aie4_config_fw(ndev); > if (ret) > - goto mailbox_fini; > + goto mbox_fini; > > - ret = aie4_partition_init(ndev); > + ret = aie4_setup_aie(ndev); > if (ret) > - goto mailbox_fini; > + goto mbox_fini; > > ret = aie4_restore_power_mode(ndev); > if (ret) > @@ -452,10 +464,11 @@ static int aie4_classic_hw_start(struct amdxdna_dev_hdl *ndev) > > partition_fini: > aie4_partition_fini(ndev); > -mailbox_fini: > +mbox_fini: > aie4_mailbox_fini(ndev); > stop_fw: > aie4_fw_stop(ndev); > + > return ret; > } > > @@ -529,8 +542,8 @@ static int aie4_prepare_firmware(struct amdxdna_dev_hdl *ndev, > void __iomem *tbl[PCI_NUM_RESOURCES]) > { > struct amdxdna_dev *xdna = ndev->aie.xdna; > + struct smu_config smu_conf = {}; > struct psp_config psp_conf; > - struct smu_config smu_conf; Reviewed-by: Lizhi Hou > int i; > > psp_conf.fw_size = npufw->size;