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Fri, 09 Oct 2026 07:27:30 -0700 (PDT) Message-ID: <77e7e412-9ee9-4a6c-9576-db4f8f673bf2@linaro.org> Date: Fri, 9 Oct 2026 15:27:29 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/8] coresight: tmc-etr: Prevent per-thread events from sharing a sink To: Leo Yan , Suzuki K Poulose Cc: Mike Leach , Suyash Mahar , Yeoreum Yun , Greg Kroah-Hartman , Qi Liu , Junhao He , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonathan Cameron References: <20260728-james-cs-multiple-per-threads-v3-0-6aee7579f1dc@linaro.org> <20260728-james-cs-multiple-per-threads-v3-4-6aee7579f1dc@linaro.org> <20260813160504.GC8904@e132581.arm.com> <20260819084515.GF8904@e132581.arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20260819084515.GF8904@e132581.arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 19/08/2026 09:45, Leo Yan wrote: > On Fri, Aug 14, 2026 at 10:09:01AM +0100, James Clark wrote: > > [...] > >> There isn't any sharing with "another perf session", unless there is a >> mistake somewhere? Checking that the owners are equivalent enforces this. Or >> do you mean another event owned by the same process? > > Now I understand that the problem is constrained to different events > within the same session. > >> I'm not sure the exact model you had in mind was that still supports this >> and fixes the bugs? > > Let me try to describe my understanding of the problem. > > ./perf test -w named_threads 2 1000000 & > ./perf record -e cs_etm//u --per-thread --pid $! > > We can simplify the flow as: > > | T1 | > CPU0 ------------------------------ > | T2 | > CPU1 ------------------------------ > `> T2 stops and the driver reports > the warning when trying to sync > ETR_BUF(T1), while T2 is associated > with ETR_BUF(T2). > > AUX_BUF(T1) | | > ETR_BUF(T1) | Bounce buf0 | -> Used by H/W trace > > > AUX_BUF(T2) | | > ETR_BUF(T2) | Bounce buf1 | -> Not used by H/W trace > > With `--per-thread --pid $PID`, perf creates separate events for the > child threads, say T1 and T2. Perf allocates a separate AUX buffer > for each event, and the ETR driver also allocates a separate bounce > buffer for each event. However, because there is only one shared ETR > sink, only one of those bounce buffers can actually be used by the > hardware at a time. > > If T1 stops while T2 is still running, the ETR remains enabled. Later, > when T2 stops, the ETR is still using ETR_BUF(T1). This mismatch > triggers the warning and prevents the data from being copied. > > I am just wandering if we can improve the sink driver to only allocate > a single bounce buffer that is independent of any threads (and any > associated events). > > | T1 | > CPU0 ------------------------------ > | T2 | > CPU1 ------------------------------ > `> T2 stops and can sync trace > from the shared bounce buffer > to AUX_BUF(T2). > > AUX_BUF(T1) | | > AUX_BUF(T2) | | > > ETR_BUF | Bounce buf | -> Used by H/W trace > > This might also simplify the CPU-wide case. Each CPU would still have > its own AUX buffer, but the ETR driver would maintain only one bounce > buffer for the shared sink. A reference count could track how many > events are using the sink, with the final event responsible for > stopping the sink and copying the trace data from bounce buffer to aux > buffer. > >> The one in this change is pretty complete and only does 4 comparisons, >> which seems quite simple to me. > > Before going further with the heavily sink buffer refactoring, perhaps > a more pragmatic solution would be to reject the problematic case for > now. Can we do something like below? > > +void coresight_trace_id_is_perf_started(struct coresight_trace_id_map *id_map) > +{ > + PERF_SESSION(atomic_read(&id_map->perf_cs_etm_session_active)); > +} > > @@ -399,6 +399,15 @@ etm_event_build_path(struct perf_event *event, int cpu, > goto out; > } > > + if (!coresight_trace_id_is_perf_started(&sink->perf_sink_id_map)) { > + sink->perf_owner = event->owner; > + sink->perf_target = event->hw.target; > + } else { > + if (sink->perf_owner != event->owner || > + sink->perf_target != event->hw.target) > + goto out; > + } > + > > We use a central place etm_event_build_path() to record and compare > event's owner and target process, then we don't need to spread the > check into sink drivers. We only care about if owner and target must > be consistent. > > Regard of the inherit/inherit_thread, I always see they are consistent > within the same session. Should we ignore them? > > Thanks, > Leo Yeah I think we can do something like this, but we only need to do it if the sink has multiple ETMs reachable, otherwise we don't need to do any ownership check at all. And we don't need to check the target either. Something like this: if (sink->has_multiple_etms) { if (!coresight_trace_id_is_perf_started(&sink->perf_sink_id_map)) sink->perf_owner = event->owner; if (sink->perf_owner != event->owner) goto out; } If there is a 1:1 sink/ETM mapping, then the perf core exclusive PMU rules already prevent all bad sharing cases. Then multiple concurrent ATTACH_TASK sessions/users are supported: perf record -e cs_etm// -- sleep 100 & perf record -e cs_etm// -- true This is allowed by the exclusive PMU rules because the two different processes can never be running on one ETM at once, and if there are no shared sinks we can allow it too. If one of the sinks on one of those sessions is shared, then the new behavior is that the second session fails to open. (If a system had a mix of shared and not shared sinks, I think Perf might handle the failures gracefully and continue with a partial set of events/CPUs opened, but it warns about this) We don't need to check hw.target because "perf --per-thread" already attaches to all existing threads (which are different), and we don't want to report busy in that case. We do need to turn context IDs on for per-thread mode though, because shared sinks mean that you might get trace from multiple different threads even in per-thread mode. But that's fine as long as the owner is the same, same as the existing per-CPU mode.