mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: matthias.bgg@gmail.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/8] arm64: dts: mediatek: cherry: Enable secondary SD/MMC controller
Date: Mon, 25 Jul 2022 12:20:03 +0200	[thread overview]
Message-ID: <781f6d3e-412e-1553-c2c2-23c9a897626b@collabora.com> (raw)
In-Reply-To: <CAGXv+5FutJb_MRwSVgjV7tByBvfq3AFsSxs6ETUZaNzrfpywgg@mail.gmail.com>

Il 25/07/22 10:54, Chen-Yu Tsai ha scritto:
> On Thu, Jul 21, 2022 at 10:51 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
>>
>> As of now, all of the boards based on the cherry platform have a
>> usable secondary SD/MMC controller, usually for SD cards: enable
>> it to allow both booting from it and generally accessing external
>> storage.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>>   .../boot/dts/mediatek/mt8195-cherry.dtsi      | 62 +++++++++++++++++++
>>   1 file changed, 62 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
>> index 2853f7f76c90..8859957c7b27 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
>> @@ -17,6 +17,7 @@ aliases {
>>                  i2c5 = &i2c5;
>>                  i2c7 = &i2c7;
>>                  mmc0 = &mmc0;
>> +               mmc1 = &mmc1;
>>                  serial0 = &uart0;
>>          };
>>
>> @@ -227,6 +228,24 @@ &mmc0 {
>>          vqmmc-supply = <&mt6359_vufs_ldo_reg>;
>>   };
>>
>> +&mmc1 {
>> +       status = "okay";
>> +
>> +       bus-width = <4>;
>> +       cap-sd-highspeed;
>> +       cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>;
>> +       max-frequency = <200000000>;
>> +       no-mmc;
>> +       no-sdio;
>> +       pinctrl-names = "default", "state_uhs";
>> +       pinctrl-0 = <&mmc1_pins_default>;
>> +       pinctrl-1 = <&mmc1_pins_uhs>;
>> +       sd-uhs-sdr50;
>> +       sd-uhs-sdr104;
>> +       vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
>> +       vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
>> +};
>> +
>>   /* for CPU-L */
>>   &mt6359_vcore_buck_reg {
>>          regulator-always-on;
>> @@ -575,6 +594,49 @@ pins-rst {
>>                  };
>>          };
>>
>> +       mmc1_pins_default: mmc1-default-pins {
>> +               pins-cmd-dat {
>> +                       pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
>> +                                <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
>> +                                <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
>> +                                <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
>> +                                <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
>> +                       input-enable;
>> +                       drive-strength = <8>;
>> +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
>> +               };
>> +
>> +               pins-clk {
>> +                       pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
>> +                       drive-strength = <8>;
>> +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
>> +               };
>> +
>> +               pins-insert {
>> +                       pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
>> +                       bias-pull-up;
>> +               };
>> +       };
>> +
>> +       mmc1_pins_uhs: mmc1-uhs-pins {
>> +               pins-cmd-dat {
>> +                       pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
>> +                                <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
>> +                                <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
>> +                                <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
>> +                                <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
>> +                       input-enable;
>> +                       drive-strength = <8>;
>> +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
>> +               };
>> +
>> +               pins-clk {
>> +                       pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
>> +                       drive-strength = <8>;
>> +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
>> +               };
> 
> I wonder if pins-insert should be duplicated here. And there's no
> difference between the standard and UHS pinconfigs. One would expect
> higher drive strength on the UHS set, if two sets were required.
> So maybe we should just have one set, and use that one for both
> the default and uhs states.
> 

I don't think that it would really make a lot of sense to duplicate the
insertion pin setup in the UHS-specific pinctrl set...

Whenever you remove the uSD card, the controller goes back to default,
as the first steps in card initialization are always happening at low
speed and only after that we can switch to UHS speeds... so we do expect
that the first-ever state is always `default` (by spec!), which means
that we are also ensuring that the insertion pin setup is always done.

Cheers,
Angelo

> Otherwise,
> 
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>
> 
>> +       };
>> +
>>          nor_pins_default: nor-default-pins {
>>                  pins-ck-io {
>>                          pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
>> --
>> 2.35.1
>>
>>


  reply	other threads:[~2022-07-25 10:20 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-21 14:50 [PATCH v2 0/8] MT8195 Acer Tomato - devicetrees Part 2 AngeloGioacchino Del Regno
2022-07-21 14:50 ` [PATCH v2 1/8] arm64: dts: mediatek: cherry: Enable the System Companion Processor AngeloGioacchino Del Regno
2022-07-25  4:21   ` Chen-Yu Tsai
2022-07-25  8:06     ` AngeloGioacchino Del Regno
2022-07-21 14:50 ` [PATCH v2 2/8] arm64: dts: mediatek: cherry: Wire up the ChromeOS EC and GSC AngeloGioacchino Del Regno
2022-07-25 10:04   ` Chen-Yu Tsai
2022-07-21 14:50 ` [PATCH v2 3/8] arm64: dts: mediatek: cherry: Add keyboard mapping for the top row AngeloGioacchino Del Regno
2022-07-25  7:59   ` Chen-Yu Tsai
2022-07-21 14:50 ` [PATCH v2 4/8] arm64: dts: mediatek: cherry: Enable secondary SD/MMC controller AngeloGioacchino Del Regno
2022-07-25  8:54   ` Chen-Yu Tsai
2022-07-25 10:20     ` AngeloGioacchino Del Regno [this message]
2022-07-26  4:04       ` Chen-Yu Tsai
2022-07-26  8:11         ` AngeloGioacchino Del Regno
2022-07-21 14:50 ` [PATCH v2 5/8] arm64: dts: mediatek: cherry: Enable Elantech eKTH3000 i2c trackpad AngeloGioacchino Del Regno
2022-07-25  7:27   ` Chen-Yu Tsai
2022-07-21 14:50 ` [PATCH v2 6/8] arm64: dts: mediatek: cherry: Enable DSP, audio codec and sound card AngeloGioacchino Del Regno
2022-07-25 10:44   ` Chen-Yu Tsai
2022-07-25 10:48     ` AngeloGioacchino Del Regno
2022-07-26  4:02       ` Chen-Yu Tsai
2022-07-21 14:50 ` [PATCH v2 7/8] arm64: dts: mediatek: cherry: Enable keyboard PWM backlight AngeloGioacchino Del Regno
2022-07-25  9:57   ` Chen-Yu Tsai
2022-07-25 10:04     ` AngeloGioacchino Del Regno
2022-07-25 10:06       ` Chen-Yu Tsai
2022-07-25 10:14         ` AngeloGioacchino Del Regno
2022-07-21 14:50 ` [PATCH v2 8/8] arm64: dts: mediatek: cherry: Enable MT6315 regulators on SPMI bus AngeloGioacchino Del Regno
2022-07-25  9:08   ` Chen-Yu Tsai

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=781f6d3e-412e-1553-c2c2-23c9a897626b@collabora.com \
    --to=angelogioacchino.delregno@collabora.com \
    --cc=devicetree@vger.kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=wenst@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®