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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7edaf99b337sm7924913a34.21.2026.07.20.08.04.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 20 Jul 2026 08:04:42 -0700 (PDT) Message-ID: <782d626c-2545-4719-9833-efbc9ba82871@oss.qualcomm.com> Date: Mon, 20 Jul 2026 20:34:36 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] arm64: dts: qcom: Add Kalambo SoC To: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Pankaj Patil Cc: Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260718-b4-kalambo-crd-v1-0-a1069b5a2757@oss.qualcomm.com> <20260718-b4-kalambo-crd-v1-2-a1069b5a2757@oss.qualcomm.com> <581659e3-9168-42b2-b715-943808d9ae2f@oss.qualcomm.com> Content-Language: en-US From: Gopikrishna Garmidi In-Reply-To: <581659e3-9168-42b2-b715-943808d9ae2f@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=HKLz0Itv c=1 sm=1 tr=0 ts=6a5e390c cx=c_pps a=lkkFf9KBb43tY3aOjL++dA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=1TCdPgPjFHuVKpGW9psA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=k4UEASGLJojhI9HsvVT1:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIwMDE2NyBTYWx0ZWRfX2/iLCNBhssGC 4smvXIzJ0HGbk5VCrmnEXTuvti3A+Zy7T/H872pzcJzQY+Vs9H/DwWY+JLgIXWfUIB9MvlKGRIQ rHNh3VfJABfObSOETXw41xTN0E9HOW4= X-Proofpoint-GUID: C1MJOTzeR5RW0NCmkPkCr60WXy_e0L2s X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIwMDE2NyBTYWx0ZWRfXzEeiExSu8LeP D1RBGUORhGVaAjR8auGhCa31712JbjVxMUp3H1/NI1dkxzAC/kmO9eCTfZJdZVhjDEzXrgTJgzy ULsfXYhccUL6yDUVpDw7ljSGmuOW8fhirqpSUImy+UjmByA1JGOqWq+V1rQGrxokfHj0SlmyFqu oCX4MbmBZrauoEaWqCRQns8v+E6vX7QBiWymw3SFL4zlihp0938b0v+QauZmTIeTkp6MiW25VFw txjJLdUC0wGr1DljUCLgl9mzdyzU8eWHmn8lim66CPDWStLspVvOkyvpLW2llVy9LYAubOzq99X JNL0+TKdKDl48SXUyHpmGV69d6HcZFdNuCRH8HoTcQRbSVX+pmRuZodTD0qjUCVA/55lVQxL/U7 DbgkHNE23avufVIMCH70vv7x0mGofbZm6XhrYoMp2ErSuQdbaE//zRDyj8cnylUyz6W6aqrhdyi paujB/9wICsyGaTVoFw== X-Proofpoint-ORIG-GUID: C1MJOTzeR5RW0NCmkPkCr60WXy_e0L2s X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-20_03,2026-07-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 clxscore=1015 malwarescore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607200167 Hi Konrad, Thanks a lot for the review and for catching these > On 7/18/26 2:06 PM, Gopikrishna Garmidi wrote: >> Introduce support for the Qualcomm Kalambo SoC. It is derived from Mahua >> with CPU cluster 0 removed, leaving it with just cluster 1. As a result, >> the PDP mailbox and SCP low-priority register windows are updated to >> match the reduced CPU complex. Everything else should work as-is. >> >> Add a label to the Glymur cluster0 cpu-map node to allow its removal on >> derived SoCs. >> >> Signed-off-by: Gopikrishna Garmidi >> --- >> arch/arm64/boot/dts/qcom/glymur.dtsi | 2 +- >> arch/arm64/boot/dts/qcom/kalambo.dtsi | 29 +++++++++++++++++++++++++++++ >> 2 files changed, 30 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi >> index 55d91c696a3a..f2feef362be5 100644 >> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi >> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi >> @@ -275,7 +275,7 @@ cpu17: cpu@20500 { >> }; >> >> cpu-map { >> - cluster0 { >> + cpu_map_cluster0: cluster0 { > > I doubt the code that parses this will be happy about not > being able to start from 'cluster0' > Good catch, you're right. parse_cluster() in drivers/base/arch_topology.c walks "cluster%d" starting at 0 and bails out on the first missing index, so deleting cluster0 and leaving only cluster1 means the topology never gets parsed at all. For v2 I'll delete both cluster0 and cluster1 and re-add the surviving cores as cluster0 in the Kalambo SoC file, so the scan starts at cluster0 as expected: /delete-node/ &cpu_map_cluster0; /delete-node/ &cpu_map_cluster1; &{/cpus/cpu-map} { cluster0 { core0 { cpu = <&cpu6>; }; ... core5 { cpu = <&cpu11>; }; }; }; Does this look right to you, or would you prefer re-pointing cluster0's cores in place rather than delete + re-add? > > [...] > >> +&pdp0_mbox { >> + reg = <0 0x17610000 0 0x8000>, <0 0x1a980000 0 0x8000>; >> +}; > > Are you sure about this change? Yes — confirmed against the SoC memory map. The Tx window is the NCC0/NCC1 mailbox instance; dropping the former cluster0 moves the Tx base from NCC0 (0x19980000) to NCC1 (0x1a980000), while reg[0] (Rx) is shared and unchanged. I'll note this in the commit message. >> +&cpu_scp_lpri1 { >> + reg = <0x180 0x60>; >> +}; > > This is specific to old firmware, at least it was on Glymur, I believe.. Right, the size was bumped permanently on the firmware side, so this override isn't needed anymore. I'll drop it in v2. > Konrad