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Tue, 18 Feb 2025 07:03:57 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51I73ux2016901 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 18 Feb 2025 07:03:56 GMT Received: from [10.218.33.29] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 17 Feb 2025 23:03:52 -0800 Message-ID: <7834c2e5-8c0a-4223-abfb-e21ae82d9e0a@quicinc.com> Date: Tue, 18 Feb 2025 12:33:45 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] clk: qcom: gdsc: Set retain_ff before moving to HW CTRL To: Taniya Das , Bjorn Andersson , Michael Turquette , "Stephen Boyd" CC: Ajit Pandey , Jagadeesh Kona , , , , References: <20250214-gdsc_fixes-v1-0-73e56d68a80f@quicinc.com> <20250214-gdsc_fixes-v1-1-73e56d68a80f@quicinc.com> Content-Language: en-US From: Imran Shaik In-Reply-To: <20250214-gdsc_fixes-v1-1-73e56d68a80f@quicinc.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 6UK_BgimCiztUGJuub_i3LL7fKFWuvN4 X-Proofpoint-ORIG-GUID: 6UK_BgimCiztUGJuub_i3LL7fKFWuvN4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-18_02,2025-02-18_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=768 spamscore=0 clxscore=1011 malwarescore=0 bulkscore=0 mlxscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502180053 On 2/14/2025 9:56 AM, Taniya Das wrote: > Enable the retain_ff_enable bit of GDSCR only if the GDSC is already ON. > Once the GDSCR moves to HW control, SW no longer can determine the state > of the GDSCR and setting the retain_ff bit could destroy all the register > contents we intended to save. > Therefore, move the retain_ff configuration before switching the GDSC to > HW trigger mode. > > Cc: stable@vger.kernel.org > Fixes: 173722995cdb ("clk: qcom: gdsc: Add support to enable retention of GSDCR") > Signed-off-by: Taniya Das > --- > drivers/clk/qcom/gdsc.c | 21 +++++++++++---------- > 1 file changed, 11 insertions(+), 10 deletions(-) > Reviewed-by: Imran Shaik Tested-by: Imran Shaik # on QCS8300