From: Gatien CHEVALLIER <gatien.chevallier@foss.st.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: <devicetree@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/7] dt-bindings: soc: st: document the RISAB firewall peripheral
Date: Mon, 2 Mar 2026 16:09:56 +0100 [thread overview]
Message-ID: <78be9de6-084d-4c3e-831d-a91fd0d1775e@foss.st.com> (raw)
In-Reply-To: <ae9962a4-b611-46e0-b124-5910e8708a20@kernel.org>
On 2/26/26 19:13, Krzysztof Kozlowski wrote:
> On 19/02/2026 15:02, Gatien CHEVALLIER wrote:
>> Just a small reintroduction of the issue:
>> We need to provide three sets of information to the drivers of RISAx:
>> - The registers of the RISAx device, handled through property "reg"
>> - The global range of memory addresses protected by the RISAx devices
>> (currently through the custom property "st,mem-map")
>> - Each individual memory range protected, handled through property
>> "memory-region" that points to children of "/reserved-memory". Memory
>> regions may not cover the whole range covered by the RISAx.
>>
>> To replace the custom property, I have explored a few ways:
>>
>> 1) Describe the memory range covered by the memory firewall as a
>> reserved memory: Cannot be done because, for the memory firewall
>> covering the DDR, the reserved memory would overlap with the memory
>> node used to describe the memory available for regular kernel use.
>> The memory node represents part of the DDR in that case.
>
> But isn't this the entire point of RISAB on main system memory? You want
> to mark part of system memory one way or another. And now you say that
> overlapping would be a problem.
>
Hello Krzysztof,
I explored a bit more the possible usage of a memory region to describe
the range covered by the RISAB/F peripherals.
To describe both the range covered by the memory firewall using a memory
region, I would need to have such node at SoC DT level:
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* Range covered by RISAF/B */
ddr: ddr@80000000 {
reg = <0x0 0x80000000 0x1 0x00000000>;
};
};
The RISAF/B peripherals need to reference memory regions contained in
the range of the memory it protects in order to apply access rights
to these region's ranges appropriately. Therefore, adding regions like:
tfm_code: tfm-code@80000000 {
reg = <0x0 0x80000000 0x0 0x100000>;
no-map;
};
cm33_cube_fw: cm33-cube-fw@80100000 {
reg = <0x0 0x80100000 0x0 0x800000>;
no-map;
};
tfm_data: tfm-data@80900000 {
reg = <0x0 0x80900000 0x0 0x100000>;
no-map;
};
...
at board level. These are regions that can or cannot be accessed
by the Linux kernel, depending on the access rights. Proceeding like
this would also force the usage of memory-region-names to be able to
differentiate the Range node from the actual memory regions. The
RISAF/B node would look like:
risaf4: risaf@420d0000 {
compatible = "st,stm32mp25-risaf-enc";
reg = <0x420d0000 0x1000>;
clocks = <&rcc CK_BUS_RISAF4>;
memory-region = <&ddr>, <&tfm_code>, <&cm33_cube_fw>, <&tfm_data>
memory-region-names = "range", "tfm-code", ...
};
Notice that the tfm_code region here share the same base address
as the node used to describe the range covered. This would result
in the following error from DTC:
xxx.dtsi:109.21-112.5: Warning (unique_unit_address_if_enabled):
/reserved-memory/ddr@80000000: duplicate unit-address (also used in node
/reserved-memory/tfm-code@80000000).
In order to use it that way, I would need to force-keep the ddr node
disabled at all time and use it only to extract the reg it describes.
Which feels weird to have a node that can never be enabled.
Also note that, for our ecosystem, these 0x80000000 -> 0x84000000
regions are inaccessible so it was simplified to (I'd prefer to
describe them all BTW):
fw@80000000 {
compatible = "shared-dma-pool";
reg = <0x0 0x80000000 0x0 0x4000000>;
no-map;
};
at board level (e.g: arch/arm64/boot/dts/st/stm32mp257f-ev1.dts).
That is completely up to the user to define its memory mapping and its
access rights per-region. One could use the lower DDR for some other
usage.
> You do understand you do not have to reserve the memory, right? You are
> doing only your specific mapping for that region.
>
Yes, understood.
>>
>> memory@80000000 {
>> device_type = "memory";
>> reg = <0x0 0x80000000 0x1 0x0>;
>> };
>>
>> reserved-memory {
>> #address-cells = <2>;
>> #size-cells = <2>;
>> ranges;
>>
>> risaf_range: risaf-range@80000000 {
>
> There is no compatible here...
There's no need for a compatible for a reserved memory?
>
>> reg = <0x0 0x80000000 0x0 0x80000000>;
>> no-map;
>
> And why no-mapping? Isn't the point of the block is to have it as main
> system memory?
Main system memory is described using the memory node:
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0>;
};
this one is used to describe the possible memory range covered by the
RISAF, which can be superior to the DDR size depending on the choice of
the user for it's DDR, so we shouldn't map this region.
As stated before, I need a way to describe the range covered by the
RISAB/F, which may not reflect what memory can be used or not by the
current execution context. Hence using a proprietary property to avoid
confusion in the DT and simplifying what is the range covered and what
are the memory region actually configured.
Best regards,
Gatien
>
>> };
>> }
>>
>
>
>
> Best regards,
> Krzysztof
next prev parent reply other threads:[~2026-03-02 15:10 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-09 14:59 [PATCH 0/7] soc: st: add RISAB dump debug driver Gatien Chevallier
2026-02-09 14:59 ` [PATCH 1/7] dt-bindings: soc: st: document the RISAB firewall peripheral Gatien Chevallier
2026-02-10 7:57 ` Krzysztof Kozlowski
2026-02-10 9:55 ` Gatien CHEVALLIER
2026-02-13 15:06 ` Krzysztof Kozlowski
2026-02-17 13:12 ` Gatien CHEVALLIER
2026-02-17 20:06 ` Krzysztof Kozlowski
2026-02-18 10:38 ` Gatien CHEVALLIER
2026-02-18 20:03 ` Krzysztof Kozlowski
2026-02-19 14:02 ` Gatien CHEVALLIER
2026-02-26 18:13 ` Krzysztof Kozlowski
2026-03-02 15:09 ` Gatien CHEVALLIER [this message]
2026-03-06 8:33 ` Gatien CHEVALLIER
2026-02-09 14:59 ` [PATCH 2/7] soc: st: add RISAB dump debug driver Gatien Chevallier
2026-02-10 7:50 ` Krzysztof Kozlowski
2026-02-10 9:57 ` Gatien CHEVALLIER
2026-02-09 14:59 ` [PATCH 3/7] arm64: dts: st: add RISAB1/2/3/4/5/6 nodes to stm32mp251.dtsi Gatien Chevallier
2026-02-10 7:51 ` Krzysztof Kozlowski
2026-02-10 9:58 ` Gatien CHEVALLIER
2026-02-09 14:59 ` [PATCH 4/7] arm64: dts: st: add RISAB1/2/3/4/5/6 nodes to stm32mp231.dtsi Gatien Chevallier
2026-02-09 14:59 ` [PATCH 5/7] arm64: dts: st: enable all RISAB instances on the stm32mp257f-ev1 board Gatien Chevallier
2026-02-09 14:59 ` [PATCH 6/7] arm64: dts: st: enable all RISAB instances on the stm32mp257f-dk board Gatien Chevallier
2026-02-09 14:59 ` [PATCH 7/7] arm64: dts: st: enable all RISAB instances on the stm32mp235f-dk board Gatien Chevallier
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