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From: Andrew Jeffery <andrew@codeconstruct.com.au>
To: "Grégoire Layet" <gregoire.layet@9elements.com>,
	"Tan Siewert" <tan.siewert@9elements.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	devicetree@vger.kernel.org,
		linux-arm-kernel@lists.infradead.org,
	linux-aspeed@lists.ozlabs.org, 	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ARM: dts: aspeed-g6: add pcie-lpc and pcie-kcs4
Date: Wed, 22 Jul 2026 16:27:34 +0930	[thread overview]
Message-ID: <793ccb3b7af22f6f38ff6544ed633b7800ea68b6.camel@codeconstruct.com.au> (raw)
In-Reply-To: <CAFi2wKZrya6aHAN9Wtwk43gqQTMPp1BamM9VKKQ+iH1UPzr4HA@mail.gmail.com>

On Mon, 2026-07-20 at 18:31 +0200, Grégoire Layet wrote:
> > > diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> > > index 56bb3b0444f7..ac351f01048f 100644
> > > --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> > > +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> > > @@ -658,6 +658,21 @@ ibt: ibt@140 {
> > >                               };
> > >                       };
> > > 
> > > +                     pcie_lpc: pcie-lpc@1e789800 {
> > 
> > lpc@1e789000 already maps 0x1e789000-0x1e78a000 and 0x1e789914 falls inside it,
> 
> I agree that there is an overlap in address space in my patch.
> I will fix this in a new revision.
> 
> > so you're describing a second `ast2600-lpc-v2` node which is unnecessary.
> > 
> > Suggestion: Merge pcie_kcs4 into lpc@1e789000 and use 914 as offset. That way
> > you don't accidentally cause an overlap for the devices if you describe more in
> > the future.
> 
> The 'kcs_bmc_aspeed' driver has the kcs channels address hard-coded.
> If the 'reg' property does not contain the three addresses used by one
> of the four channels, the driver returns -EINVAL.
> So having a pcie-kcs4 with regs 0x914, 0x918 and 0x91c doesn't work.

It does work if you fix the driver to allow it.

> 
> This is why a second LPC node was added, for the pcie-kcs4 to have
> regs 0x114, 0x118 and 0x11c;
> 
> I know we should write device tree sources based on hardware rather
> than around driver limitations.
> Changing how the driver behaves seems excessive for supporting KCS over PCIe.

I don't think this is true.

> I think a point can be made that the LPC over PCIe is a different LPC bus.

In my opinion it's most helpful if Table 8 in the datasheet is used as
the reference for address ranges in the devicetree. With that in mind,
I don't intend to apply a patch adding a new node as you've proposed. I
suggest adjusting the driver to identify the X{{I,O}D,ST}R4 addresses
as channel 4, under the existing LPC node as Tan suggested.

Andrew

  reply	other threads:[~2026-07-22  6:57 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-15 12:34 Grégoire Layet
2026-07-15 14:31 ` Tan Siewert
2026-07-20 16:31   ` Grégoire Layet
2026-07-22  6:57     ` Andrew Jeffery [this message]
2026-07-22  7:48       ` Grégoire Layet

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