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From: Dmitry Osipenko <digetx@gmail.com>
To: Stephen Warren <swarren@wwwdotorg.org>,
	Jon Hunter <jonathanh@nvidia.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Rob Herring <robh+dt@kernel.org>,
	Vinod Koul <vinod.koul@intel.com>
Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
	dmaengine@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 3/5] dt-bindings: Add DT bindings for NVIDIA Tegra AHB DMA controller
Date: Tue, 3 Oct 2017 02:02:56 +0300	[thread overview]
Message-ID: <795e4b19-b747-74c1-6f92-b961ab4bf822@gmail.com> (raw)
In-Reply-To: <788f73dc-e011-aa9d-8850-f01ab9459c91@wwwdotorg.org>

On 02.10.2017 20:05, Stephen Warren wrote:
> On 09/29/2017 09:11 PM, Dmitry Osipenko wrote:
>> On 29.09.2017 22:30, Stephen Warren wrote:
>>> On 09/27/2017 02:34 AM, Jon Hunter wrote:
>>>>
>>>> On 27/09/17 02:57, Dmitry Osipenko wrote:
>>>>> On 26.09.2017 17:50, Jon Hunter wrote:
>>>>>>
>>>>>> On 26/09/17 00:22, Dmitry Osipenko wrote:
>>>>>>> Document DT bindings for NVIDIA Tegra AHB DMA controller that presents
>>>>>>> on Tegra20/30 SoC's.
>>>>>>>
>>>>>>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>>>>>>> ---
>>>>>>>    .../bindings/dma/nvidia,tegra20-ahbdma.txt         | 23
>>>>>>> ++++++++++++++++++++++
>>>>>>>    1 file changed, 23 insertions(+)
>>>>>>>    create mode 100644
>>>>>>> Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt
>>>>>>>
>>>>>>> diff --git
>>>>>>> a/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt
>>>>>>> b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt
>>>>>>> new file mode 100644
>>>>>>> index 000000000000..2af9aa76ae11
>>>>>>> --- /dev/null
>>>>>>> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt
>>>>>>> @@ -0,0 +1,23 @@
>>>>>>> +* NVIDIA Tegra AHB DMA controller
>>>>>>> +
>>>>>>> +Required properties:
>>>>>>> +- compatible:    Must be "nvidia,tegra20-ahbdma"
>>>>>>> +- reg:        Should contain registers base address and length.
>>>>>>> +- interrupts:    Should contain one entry, DMA controller interrupt.
>>>>>>> +- clocks:    Should contain one entry, DMA controller clock.
>>>>>>> +- resets :    Should contain one entry, DMA controller reset.
>>>>>>> +- #dma-cells:    Should be <1>. The cell represents DMA request select
>>>>>>> value
>>>>>>> +        for the peripheral. For more details consult the Tegra TRM's
>>>>>>> +        documentation, in particular AHB DMA channel control register
>>>>>>> +        REQ_SEL field.
>>>>>>
>>>>>> What about the TRIG_SEL field? Do we need to handle this here as well?
>>>>>>
>>>>>
>>>>> Actually, DMA transfer trigger isn't related a hardware description. It's
>>>>> up to
>>>>> software to decide what trigger to select. So it shouldn't be in the binding.
>>>>
>>>> I think it could be, if say a board wanted a GPIO to trigger a transfer.
>>>>
>>>>> And I think the same applies to requester... any objections?
>>>>
>>>> Well, the REQ_SEL should definitely be in the binding.
>>>>
>>>> Laxman, Stephen, what are your thoughts on the TRIG_SEL field? Looks
>>>> like we never bothered with it for the APB DMA and so maybe no ones uses
>>>> this.
>>>
>>> I don't think TRIG_SEL should be in the binding, at least at present. While
>>> TRIG_SEL certainly is something used to configure the transfer, I believe the
>>> semantics of the current DMA binding only cover DMA transfers that are initiated
>>> when SW desires, rather than being a combination of after SW programs the
>>> transfer plus some other HW event. So, we always use a default/hard-coded
>>> TRIG_SEL value. As such, there's no need for a TRIG_SEL value in DT. There's
>>> certainly no known use-case that requires a non-default TRIG_SEL value at
>>> present. We could add an extra #dma-cells value later if we find a use for it,
>>> and the semantics of that use-case make sense to add it to the DMA specifier,
>>> rather than some other separate higher-level property/driver/...
>>
>> Thank you for the comment. If we'd want to extend the binding further with the
>> trigger, how to differentiate trigger from the requester in a case of a single
>> #data-cell?
>>
>> Of course realistically a chance that the further extension would be needed is
>> very-very low, so we may defer the efforts to solve that question and for now
>> make driver aware of the potential #dma-cells extension.
> 
> The request selector cell isn't optional, so is always present. If we later add
> an optional trig_sel cell, we'll either have:
> 
> #dma-cells=<1>: req_sel
> 
> or:
> 
> #dma-cells=<2>: req_sel, trig_sel

Why request sel. couldn't be optional? Could you please elaborate a bit more?

I think possible options are:

#dma-cells=<1>: req_sel
#dma-cells=<1>: trig_sel
#dma-cells=<2>: req_sel, trig_sel

The only difference between request and trigger is that trigger issues the whole
transfer, while request only a single burst. Isn't it possible to have a case in
HW for the "trigger-only" option? If not or it's a rareness, then I agree that
REQ_SEL must be mandatory.

  reply	other threads:[~2017-10-02 23:03 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-25 23:22 [PATCH v1 0/5] NVIDIA Tegra AHB DMA controller driver Dmitry Osipenko
2017-09-25 23:22 ` [PATCH v1 1/5] clk: tegra: Add AHB DMA clock entry Dmitry Osipenko
2017-09-26  9:56   ` Peter De Schrijver
2017-09-26 14:46     ` Dmitry Osipenko
2017-09-27  8:36       ` Peter De Schrijver
2017-09-27  9:41         ` Dmitry Osipenko
2017-09-25 23:22 ` [PATCH v1 2/5] clk: tegra: Bump SCLK clock rate to 216MHz on Tegra20 Dmitry Osipenko
2017-09-26 10:01   ` Peter De Schrijver
2017-09-25 23:22 ` [PATCH v1 3/5] dt-bindings: Add DT bindings for NVIDIA Tegra AHB DMA controller Dmitry Osipenko
2017-09-26 14:50   ` Jon Hunter
2017-09-26 15:16     ` Dmitry Osipenko
2017-09-27  1:57     ` Dmitry Osipenko
2017-09-27  8:34       ` Jon Hunter
2017-09-27 12:12         ` Dmitry Osipenko
2017-09-27 13:44           ` Jon Hunter
2017-09-27 13:46             ` Jon Hunter
2017-09-27 14:29               ` Dmitry Osipenko
2017-09-27 23:32         ` Stephen Boyd
2017-09-28  8:33           ` Jon Hunter
2017-09-29 19:30         ` Stephen Warren
2017-09-30  3:11           ` Dmitry Osipenko
2017-10-02 17:05             ` Stephen Warren
2017-10-02 23:02               ` Dmitry Osipenko [this message]
2017-10-03 10:32                 ` Jon Hunter
2017-10-03 12:07                   ` Dmitry Osipenko
2017-10-03 12:19                     ` Jon Hunter
2017-10-03 15:38                   ` Stephen Warren
2017-10-03 17:04                     ` Dmitry Osipenko
2017-10-05 20:33   ` Rob Herring
2017-10-05 21:30     ` Dmitry Osipenko
2017-09-25 23:22 ` [PATCH v1 4/5] dmaengine: Add driver " Dmitry Osipenko
2017-09-26 14:45   ` Jon Hunter
2017-09-26 16:06     ` Dmitry Osipenko
2017-09-26 21:37       ` Jon Hunter
2017-09-26 23:00         ` Dmitry Osipenko
2017-09-28  9:29   ` Vinod Koul
2017-09-28 12:17     ` Dmitry Osipenko
2017-09-28 14:06     ` Dmitry Osipenko
2017-09-28 14:35       ` Dmitry Osipenko
2017-09-28 16:22         ` Vinod Koul
2017-09-28 16:37           ` Dmitry Osipenko
2017-09-28 16:21       ` Vinod Koul
2017-09-25 23:22 ` [PATCH v1 5/5] ARM: dts: tegra: Add AHB DMA controller nodes Dmitry Osipenko
2017-09-28  9:31 ` [PATCH v1 0/5] NVIDIA Tegra AHB DMA controller driver Vinod Koul
2017-09-28 12:24   ` Dmitry Osipenko

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