From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8642C67839 for ; Wed, 12 Dec 2018 08:19:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 85FD52084E for ; Wed, 12 Dec 2018 08:19:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 85FD52084E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726723AbeLLIT1 (ORCPT ); Wed, 12 Dec 2018 03:19:27 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:54104 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726478AbeLLIT1 (ORCPT ); Wed, 12 Dec 2018 03:19:27 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id wBC8BjLs004383; Wed, 12 Dec 2018 09:18:59 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2p85qk5hqq-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 12 Dec 2018 09:18:59 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 305BD38; Wed, 12 Dec 2018 08:18:58 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E0E192624; Wed, 12 Dec 2018 08:18:57 +0000 (GMT) Received: from [10.48.0.167] (10.75.127.48) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 12 Dec 2018 09:18:57 +0100 Subject: Re: [PATCH 1/3] dt-bindings: mfd: syscon: Add optional clock support To: Rob Herring CC: , , , , , , , , , References: <1543337297-21873-1-git-send-email-fabrice.gasnier@st.com> <1543337297-21873-2-git-send-email-fabrice.gasnier@st.com> <20181211221653.GA18104@bogus> From: Fabrice Gasnier Message-ID: <79817f52-0430-acd9-857e-c53f358c87c2@st.com> Date: Wed, 12 Dec 2018 09:18:56 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20181211221653.GA18104@bogus> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG1NODE2.st.com (10.75.127.2) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-12-12_02:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/11/18 11:16 PM, Rob Herring wrote: > On Tue, Nov 27, 2018 at 05:48:15PM +0100, Fabrice Gasnier wrote: >> Some system control registers need to be clocked, so the registers can >> be accessed. Add an optional clock. >> >> Signed-off-by: Fabrice Gasnier >> --- >> Documentation/devicetree/bindings/mfd/syscon.txt | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/Documentation/devicetree/bindings/mfd/syscon.txt b/Documentation/devicetree/bindings/mfd/syscon.txt >> index 25d9e9c..a9aaa51 100644 >> --- a/Documentation/devicetree/bindings/mfd/syscon.txt >> +++ b/Documentation/devicetree/bindings/mfd/syscon.txt >> @@ -17,6 +17,7 @@ Optional property: >> - reg-io-width: the size (in bytes) of the IO accesses that should be >> performed on the device. >> - hwlocks: reference to a phandle of a hardware spinlock provider node. >> +- clocks: phandle to the syscon clock > > No. Add clocks to specific bindings using syscon. If you have a node > with only 'syscon', then that should be fixed. Hi Rob, Thanks for reviewing, so I'll - add it to Documentation/devicetree/bindings/arm/stm32/stm32-syscon.txt - send a v2 with this change. Best regards, Fabrice > > Rob >