From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.mindbit.ro (xs1.mindbit.ro [80.86.107.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43410283FDD for ; Sat, 21 Mar 2026 16:17:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.86.107.70 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774109871; cv=none; b=tkK/AExX7vDtKnpy4kSjANivTl6sKYX3v1djzIa/EppimVPqSDaaGNskYvu7Dm4WUijOMCgLg6cZXTybngzXed/JjQmYTUP9c92SqI3t/hcrDio4eSKXztiWba61OIW9rHLwZsfXMBbxITV8d1h8H2cS7Vxhut4wS5m+089wLP8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774109871; c=relaxed/simple; bh=VbaLF1nhpCnBgRk0EVUZLfhq+wuWZAbJ0145ZovjIRY=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=fev74WwrVPwpdi3s5A8Xj5AW1xfzxefE+I/4R2xoHZ2Y7XYGpAOXX66XBHKeidTwl6flgmFG4G+Kk4rAHpVFoRXO9HBL00eky3fujWzeEZHEd2fn2nzBrh2RX+f3MXqA9FuvLlU2LvoW5mN35Te0eFMGanwk5Tumhs6MZFh3CD8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=rendec.net; spf=pass smtp.mailfrom=rendec.net; dkim=pass (2048-bit key) header.d=rendec.net header.i=@rendec.net header.b=kxcUhnDz; arc=none smtp.client-ip=80.86.107.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=rendec.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rendec.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rendec.net header.i=@rendec.net header.b="kxcUhnDz" Received: from dog.kanata.rendec.net (pool-174-112-193-187.cpe.net.cable.rogers.com [174.112.193.187]) by mail.mindbit.ro (Postfix) with ESMTPSA id CDDF7C2420; Sat, 21 Mar 2026 18:10:27 +0200 (EET) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.mindbit.ro CDDF7C2420 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rendec.net; s=default; t=1774109428; bh=OsEW0y30oyxr59iq06omeP8xEsL+G3vF164uxkpOV3k=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=kxcUhnDzsxXfr+gJuEuZJOvHwxaBSU/w4wzehJh9KsCh88Wa8iZqwD2MCEO5H7yuR 3iBOa9Gpd/b0CvBEwILz4hFacISQiiRZKfs2CzQv4TSRL4qmUpFf+Oe3BB2ZxkdcBB 47AWQb9YRZlS/CZDZFjPGV0BVDoYbP+4aCHs+3D8aEKFl4TJFrvmwc4bUdnZ56gEF+ 79NKEZfcimQU0X3/tVERM+eIPWGXKoGxjTfduoURppuquZILRXNfIlhmLVLNiKihP9 PBFr3kdgbTpjkooXag6fYQq8t5grJwNcm8nkrrJd5dSlmZqe+jXFEAHs4kzqYQYzxI xdwu5/J51HbcA== Message-ID: <79b4ff019463b175ce68f9a846fc1396938cb9c3.camel@rendec.net> Subject: Re: [patch v2 01/14] x86/irq: Optimize interrupts decimals printing From: Radu Rendec To: Thomas Gleixner , LKML Cc: x86@kernel.org, Dmitry Ilvokhin , Neil Horman Date: Sat, 21 Mar 2026 12:10:26 -0400 In-Reply-To: <20260320132102.095030770@kernel.org> References: <20260320131108.344376329@kernel.org> <20260320132102.095030770@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-2.fc42) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2026-03-20 at 14:21 +0100, Thomas Gleixner wrote: > From: Dmitry Ilvokhin >=20 > Monitoring tools periodically scan /proc/interrupts to export metrics as = a > timeseries for future analysis and investigation. >=20 > In large fleets, /proc/interrupts is polled (often every few seconds) on > every machine. The cumulative overhead adds up quickly across thousands > of nodes, so reducing the cost of generating these stats does have a > measurable operational impact. With the ongoing trend toward higher core > counts per machine, this cost becomes even more noticeable over time, > since interrupt counters are per-CPU. In Meta's fleet, we have observed > this overhead at scale. >=20 > Although a binary /proc interface would be a better long-term solution > due to lower formatting (kernel side) and parsing (userspace side) > overhead, the text interface will remain in use for some time, even if > better solutions will be available. Optimizing the /proc/interrupts > printing code is therefore still beneficial. >=20 > Function seq_printf() supports rich format string for decimals printing, > but it doesn't required for printing /proc/interrupts per CPU counters, > seq_put_decimal_ull_width() function can be used instead to print per > CPU counters, because very limited formatting is required for this case. > Similar optimization idea is already used in show_interrupts(). >=20 > Performance counter stats (truncated) for 'sh -c cat /proc/interrupts >=20 > Before: >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 3.42 msec task-clock=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 0.802 CPUs utilized=C2=A0=C2=A0 (= +-=C2=A0 0.05% ) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 1=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 context-switches=C2=A0 #=C2=A0 291.991 /sec=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ( +-=C2=A0 0.74% ) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 cpu-migrations=C2=A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 0.000 /sec > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 343=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pa= ge-faults=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #=C2=A0 100.153 K/sec=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ( +-=C2=A0 0.01% ) > =C2=A08,932,242=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 instructions=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 1.66=C2=A0 insn per cycle=C2=A0 ( +-=C2= =A0 0.34% ) > =C2=A05,374,427=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 cycles=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 1.569 GHz= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ( = +-=C2=A0 0.04% ) > =C2=A01,483,154=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 branches=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #=C2=A0 433.068 M/sec=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ( +-=C2=A0 0.22% ) > =C2=A0=C2=A0=C2=A0 28,768=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 branch-misses=C2= =A0=C2=A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 1.94% of all branches ( +-=C2=A0 = 0.31% ) >=20 > 0.00427182 +- 0.00000215 seconds time elapsed=C2=A0 ( +-=C2=A0 0.05% ) >=20 > After: >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 2.39 msec task-clock=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 0.796 CPUs utilized=C2=A0=C2=A0 (= +-=C2=A0 0.06% ) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 1=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 context-switches=C2=A0 #=C2=A0 418.541 /sec=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ( +-=C2=A0 0.70% ) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 cpu-migrations=C2=A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 0.000 /sec > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 343=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pa= ge-faults=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #=C2=A0 143.560 K/sec=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ( +-=C2=A0 0.01% ) > =C2=A07,020,982=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 instructions=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 1.30=C2=A0 insn per cycle=C2=A0 ( +-=C2= =A0 0.52% ) > =C2=A05,397,266=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 cycles=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 2.259 GHz= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ( = +-=C2=A0 0.06% ) > =C2=A01,569,648=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 branches=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #=C2=A0 656.962 M/sec=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ( +-=C2=A0 0.08% ) > =C2=A0=C2=A0=C2=A0 25,419=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 branch-misses=C2= =A0=C2=A0=C2=A0=C2=A0 #=C2=A0=C2=A0=C2=A0 1.62% of all branches ( +-=C2=A0 = 0.72% ) >=20 > 0.00299996 +- 0.00000206 seconds time elapsed=C2=A0 ( +-=C2=A0 0.07% ) >=20 > Relative speed up in time elapsed is around 29%. >=20 > [ tglx: Fixed it up so it applies to current mainline ] >=20 > Signed-off-by: Dmitry Ilvokhin > Signed-off-by: Thomas Gleixner > Link: https://patch.msgid.link/aQj5mGZ6_BBlAm3B@shell.ilvokhin.com >=20 > --- > Changes v2: > - Expanded commit message: add more rationale for the proposed change. > - Renamed helper put_spaced_decimal() -> put_decimal() primarely to make > =C2=A0 checkpatch.pl --strict pass. >=20 > =C2=A0arch/x86/kernel/irq.c |=C2=A0 112 ++++++++++++++++++++++++++-------= ----------------- > =C2=A01 file changed, 59 insertions(+), 53 deletions(-) > --- a/arch/x86/kernel/irq.c > +++ b/arch/x86/kernel/irq.c > @@ -62,6 +62,18 @@ void ack_bad_irq(unsigned int irq) > =C2=A0 apic_eoi(); > =C2=A0} > =C2=A0 > +/* > + * A helper routine for putting space and decimal number without overhea= d > + * from rich format of printf(). > + */ > +static void put_decimal(struct seq_file *p, unsigned long long num) > +{ > + const char *delimiter =3D " "; > + unsigned int width =3D 10; > + > + seq_put_decimal_ull_width(p, delimiter, num, width); > +} > + > =C2=A0#define irq_stats(x) (&per_cpu(irq_stat, x)) > =C2=A0/* > =C2=A0 * /proc/interrupts printing for arch specific interrupts > @@ -70,103 +82,101 @@ int arch_show_interrupts(struct seq_file > =C2=A0{ > =C2=A0 int j; > =C2=A0 > - seq_printf(p, "%*s: ", prec, "NMI"); > + seq_printf(p, "%*s:", prec, "NMI"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->__nmi_count); > + put_decimal(p, irq_stats(j)->__nmi_count); > =C2=A0 seq_puts(p, "=C2=A0 Non-maskable interrupts\n"); > =C2=A0#ifdef CONFIG_X86_LOCAL_APIC > - seq_printf(p, "%*s: ", prec, "LOC"); > + seq_printf(p, "%*s:", prec, "LOC"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs); > + put_decimal(p, irq_stats(j)->apic_timer_irqs); > =C2=A0 seq_puts(p, "=C2=A0 Local timer interrupts\n"); > =C2=A0 > - seq_printf(p, "%*s: ", prec, "SPU"); > + seq_printf(p, "%*s:", prec, "SPU"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count); > + put_decimal(p, irq_stats(j)->irq_spurious_count); > =C2=A0 seq_puts(p, "=C2=A0 Spurious interrupts\n"); > - seq_printf(p, "%*s: ", prec, "PMI"); > + seq_printf(p, "%*s:", prec, "PMI"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs); > + put_decimal(p, irq_stats(j)->apic_perf_irqs); > =C2=A0 seq_puts(p, "=C2=A0 Performance monitoring interrupts\n"); > - seq_printf(p, "%*s: ", prec, "IWI"); > + seq_printf(p, "%*s:", prec, "IWI"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->apic_irq_work_irqs); > + put_decimal(p, irq_stats(j)->apic_irq_work_irqs); > =C2=A0 seq_puts(p, "=C2=A0 IRQ work interrupts\n"); > - seq_printf(p, "%*s: ", prec, "RTR"); > + seq_printf(p, "%*s:", prec, "RTR"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->icr_read_retry_count); > + put_decimal(p, irq_stats(j)->icr_read_retry_count); > =C2=A0 seq_puts(p, "=C2=A0 APIC ICR read retries\n"); > =C2=A0 if (x86_platform_ipi_callback) { > - seq_printf(p, "%*s: ", prec, "PLT"); > + seq_printf(p, "%*s:", prec, "PLT"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis); > + put_decimal(p, irq_stats(j)->x86_platform_ipis); > =C2=A0 seq_puts(p, "=C2=A0 Platform interrupts\n"); > =C2=A0 } > =C2=A0#endif > =C2=A0#ifdef CONFIG_SMP > - seq_printf(p, "%*s: ", prec, "RES"); > + seq_printf(p, "%*s:", prec, "RES"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count); > + put_decimal(p, irq_stats(j)->irq_resched_count); > =C2=A0 seq_puts(p, "=C2=A0 Rescheduling interrupts\n"); > - seq_printf(p, "%*s: ", prec, "CAL"); > + seq_printf(p, "%*s:", prec, "CAL"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->irq_call_count); > + put_decimal(p, irq_stats(j)->irq_call_count); > =C2=A0 seq_puts(p, "=C2=A0 Function call interrupts\n"); > - seq_printf(p, "%*s: ", prec, "TLB"); > + seq_printf(p, "%*s:", prec, "TLB"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count); > + put_decimal(p, irq_stats(j)->irq_tlb_count); > =C2=A0 seq_puts(p, "=C2=A0 TLB shootdowns\n"); > =C2=A0#endif > =C2=A0#ifdef CONFIG_X86_THERMAL_VECTOR > - seq_printf(p, "%*s: ", prec, "TRM"); > + seq_printf(p, "%*s:", prec, "TRM"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count); > + put_decimal(p, irq_stats(j)->irq_thermal_count); > =C2=A0 seq_puts(p, "=C2=A0 Thermal event interrupts\n"); > =C2=A0#endif > =C2=A0#ifdef CONFIG_X86_MCE_THRESHOLD > - seq_printf(p, "%*s: ", prec, "THR"); > + seq_printf(p, "%*s:", prec, "THR"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count); > + put_decimal(p, irq_stats(j)->irq_threshold_count); > =C2=A0 seq_puts(p, "=C2=A0 Threshold APIC interrupts\n"); > =C2=A0#endif > =C2=A0#ifdef CONFIG_X86_MCE_AMD > - seq_printf(p, "%*s: ", prec, "DFR"); > + seq_printf(p, "%*s:", prec, "DFR"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->irq_deferred_error_count); > + put_decimal(p, irq_stats(j)->irq_deferred_error_count); > =C2=A0 seq_puts(p, "=C2=A0 Deferred Error APIC interrupts\n"); > =C2=A0#endif > =C2=A0#ifdef CONFIG_X86_MCE > - seq_printf(p, "%*s: ", prec, "MCE"); > + seq_printf(p, "%*s:", prec, "MCE"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", per_cpu(mce_exception_count, j)); > + put_decimal(p, per_cpu(mce_exception_count, j)); > =C2=A0 seq_puts(p, "=C2=A0 Machine check exceptions\n"); > - seq_printf(p, "%*s: ", prec, "MCP"); > + seq_printf(p, "%*s:", prec, "MCP"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", per_cpu(mce_poll_count, j)); > + put_decimal(p, per_cpu(mce_poll_count, j)); > =C2=A0 seq_puts(p, "=C2=A0 Machine check polls\n"); > =C2=A0#endif > =C2=A0#ifdef CONFIG_X86_HV_CALLBACK_VECTOR > =C2=A0 if (test_bit(HYPERVISOR_CALLBACK_VECTOR, system_vectors)) { > - seq_printf(p, "%*s: ", prec, "HYP"); > + seq_printf(p, "%*s:", prec, "HYP"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", > - =C2=A0=C2=A0 irq_stats(j)->irq_hv_callback_count); > + put_decimal(p, irq_stats(j)->irq_hv_callback_count); > =C2=A0 seq_puts(p, "=C2=A0 Hypervisor callback interrupts\n"); > =C2=A0 } > =C2=A0#endif > =C2=A0#if IS_ENABLED(CONFIG_HYPERV) > =C2=A0 if (test_bit(HYPERV_REENLIGHTENMENT_VECTOR, system_vectors)) { > - seq_printf(p, "%*s: ", prec, "HRE"); > + seq_printf(p, "%*s:", prec, "HRE"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", > - =C2=A0=C2=A0 irq_stats(j)->irq_hv_reenlightenment_count); > + put_decimal(p, > + =C2=A0=C2=A0=C2=A0 irq_stats(j)->irq_hv_reenlightenment_count); > =C2=A0 seq_puts(p, "=C2=A0 Hyper-V reenlightenment interrupts\n"); > =C2=A0 } > =C2=A0 if (test_bit(HYPERV_STIMER0_VECTOR, system_vectors)) { > - seq_printf(p, "%*s: ", prec, "HVS"); > + seq_printf(p, "%*s:", prec, "HVS"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", > - =C2=A0=C2=A0 irq_stats(j)->hyperv_stimer0_count); > + put_decimal(p, irq_stats(j)->hyperv_stimer0_count); > =C2=A0 seq_puts(p, "=C2=A0 Hyper-V stimer0 interrupts\n"); > =C2=A0 } > =C2=A0#endif > @@ -175,35 +185,31 @@ int arch_show_interrupts(struct seq_file > =C2=A0 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_cou= nt)); > =C2=A0#endif > =C2=A0#if IS_ENABLED(CONFIG_KVM) > - seq_printf(p, "%*s: ", prec, "PIN"); > + seq_printf(p, "%*s:", prec, "PIN"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", irq_stats(j)->kvm_posted_intr_ipis); > + put_decimal(p, irq_stats(j)->kvm_posted_intr_ipis); > =C2=A0 seq_puts(p, "=C2=A0 Posted-interrupt notification event\n"); > =C2=A0 > - seq_printf(p, "%*s: ", prec, "NPI"); > + seq_printf(p, "%*s:", prec, "NPI"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", > - =C2=A0=C2=A0 irq_stats(j)->kvm_posted_intr_nested_ipis); > + put_decimal(p, irq_stats(j)->kvm_posted_intr_nested_ipis); > =C2=A0 seq_puts(p, "=C2=A0 Nested posted-interrupt event\n"); > =C2=A0 > - seq_printf(p, "%*s: ", prec, "PIW"); > + seq_printf(p, "%*s:", prec, "PIW"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", > - =C2=A0=C2=A0 irq_stats(j)->kvm_posted_intr_wakeup_ipis); > + put_decimal(p, irq_stats(j)->kvm_posted_intr_wakeup_ipis); > =C2=A0 seq_puts(p, "=C2=A0 Posted-interrupt wakeup event\n"); > =C2=A0#endif > =C2=A0#ifdef CONFIG_GUEST_PERF_EVENTS > - seq_printf(p, "%*s: ", prec, "VPMI"); > + seq_printf(p, "%*s:", prec, "VPMI"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", > - =C2=A0=C2=A0 irq_stats(j)->perf_guest_mediated_pmis); > + put_decimal(p, irq_stats(j)->perf_guest_mediated_pmis); > =C2=A0 seq_puts(p, " Perf Guest Mediated PMI\n"); > =C2=A0#endif > =C2=A0#ifdef CONFIG_X86_POSTED_MSI > - seq_printf(p, "%*s: ", prec, "PMN"); > + seq_printf(p, "%*s:", prec, "PMN"); > =C2=A0 for_each_online_cpu(j) > - seq_printf(p, "%10u ", > - =C2=A0=C2=A0 irq_stats(j)->posted_msi_notification_count); > + put_decimal(p, irq_stats(j)->posted_msi_notification_count); > =C2=A0 seq_puts(p, "=C2=A0 Posted MSI notification event\n"); > =C2=A0#endif > =C2=A0 return 0; Nit: The patch changes the alignment of the descriptions by 1 space (it moves the descriptions to the left). If that's intentional, perhaps it should be added to the description? TBH, I like it better like that because the description is now aligned with the generic interrupts. Reviewed-by: Radu Rendec