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([2a01:e0a:982:cbb0:8ad2:e64c:f150:ebc6]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434aa7a4f69sm25388865e9.3.2024.11.27.07.55.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Nov 2024 07:55:28 -0800 (PST) Message-ID: <79e76b0d-15df-444e-ab14-24cf32678b96@linaro.org> Date: Wed, 27 Nov 2024 16:55:27 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: neil.armstrong@linaro.org Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH v2 08/11] drm/msm: adreno: request for maximum bus bandwidth usage To: Akhil P Oommen Cc: Viresh Kumar , Nishanth Menon , Stephen Boyd , "Rafael J. Wysocki" , Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , Simona Vetter , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Connor Abbott , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org References: <20241119-topic-sm8x50-gpu-bw-vote-v2-0-4deb87be2498@linaro.org> <20241119-topic-sm8x50-gpu-bw-vote-v2-8-4deb87be2498@linaro.org> <20241123225954.lv3k2fxk7rxyh67z@hu-akhilpo-hyd.qualcomm.com> <1965cd01-7b31-4f16-82b2-27fd56fcb77e@linaro.org> <2d3a77da-cf73-4888-bc4d-68482181c908@quicinc.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <2d3a77da-cf73-4888-bc4d-68482181c908@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 27/11/2024 16:46, Akhil P Oommen wrote: > On 11/25/2024 1:44 PM, Neil Armstrong wrote: >> On 23/11/2024 23:59, Akhil P Oommen wrote: >>> On Tue, Nov 19, 2024 at 06:56:43PM +0100, Neil Armstrong wrote: >>>> When requesting a DDR bandwidth level along a GPU frequency >>>> level via the GMU, we can also specify the bus bandwidth usage in a >>>> 16bit >>>> quantitized value. >>>> >>>> For now simply request the maximum bus usage. >>> >>> Why? You don't care about power efficiency? >>> Lets drop this patch. We don't care about AB vote yet. >> >> I care about functionality, without this AB vote the spillall use >> case that fails on SM8650 HDK fails on the SM8650 QRD. > > This should have been documented as a comment so that someone doesn't > remove it in future. > >> >> AB is a quantitized value of the BW voted, so yes I expect we can have >> 100% of the BW voted, but since we scale the BW it's perfectly fine. > > Ah! no. MAX AB vote here is equal to the Max IB vote value in the hfi > table. This is why I was asking about including all BW levels from the > DT in the hfi table in the other patch. > > So you are always voting for Max DDR Freq which is probably helping (or > masking?) the spill all issue. We can just add a quirk to vote for MAX > IB probably. Oh, indeed I've been re-reading gen7_bus_ab_quantize() and it seems I should calculate the AB vote when building the bw_table. Thanks, Neil > > -Akhil > >> >> Neil >> >>> >>> -Akhil >>> >>>> >>>> Signed-off-by: Neil Armstrong >>>> --- >>>>   drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 +++++++++++ >>>>   drivers/gpu/drm/msm/adreno/a6xx_hfi.h |  5 +++++ >>>>   2 files changed, 16 insertions(+) >>>> >>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/ >>>> msm/adreno/a6xx_gmu.c >>>> index >>>> dc2d0035544e7848e5c4ea27f1ea9a191f9c4991..36c0f67fd8e109aabf09a0804bacbed3593c39d7 100644 >>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >>>> @@ -134,6 +134,17 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, >>>> struct dev_pm_opp *opp, >>>>               if (bw == gmu->gpu_bw_table[bw_index]) >>>>                   break; >>>>           } >>>> + >>>> +        if (bw_index) { >>>> +            /* >>>> +             * Append AB vote to the maximum bus usage. >>>> +             * AB represents a quantitized 16bit value of the >>>> +             * max ddr bandwidth we could use, let's simply >>>> +             * request the maximum for now. >>>> +             */ >>>> +            bw_index |= AB_VOTE(MAX_AB_VOTE); >>>> +            bw_index |= AB_VOTE_ENABLE; >>>> +        } >>>>       } >>>>         gmu->current_perf_index = perf_index; >>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_hfi.h b/drivers/gpu/drm/ >>>> msm/adreno/a6xx_hfi.h >>>> index >>>> 528110169398f69f16443a29a1594d19c36fb595..52ba4a07d7b9a709289acd244a751ace9bdaab5d 100644 >>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.h >>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.h >>>> @@ -173,6 +173,11 @@ struct a6xx_hfi_gx_bw_perf_vote_cmd { >>>>       u32 bw; >>>>   }; >>>>   +#define AB_VOTE_MASK        GENMASK(31, 16) >>>> +#define MAX_AB_VOTE        (FIELD_MAX(AB_VOTE_MASK) - 1) >>>> +#define AB_VOTE(vote)        FIELD_PREP(AB_VOTE_MASK, (vote)) >>>> +#define AB_VOTE_ENABLE        BIT(8) >>>> + >>>>   #define HFI_H2F_MSG_PREPARE_SLUMBER 33 >>>>     struct a6xx_hfi_prep_slumber_cmd { >>>> >>>> -- >>>> 2.34.1 >>>> >> >