From: "Alexis Lothoré" <alexis.lothore@bootlin.com>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: andrew@lunn.ch, f.fainelli@gmail.com, davem@davemloft.net,
edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
herve.codina@bootlin.com, miquel.raynal@bootlin.com,
milan.stevanovic@se.com, jimmy.lalande@se.com,
pascal.eberhard@se.com
Subject: Re: [PATCH net v2 2/3] net: dsa: rzn1-a5psw: fix STP states handling
Date: Fri, 12 May 2023 08:33:52 +0200 [thread overview]
Message-ID: <7a2c205a-70dc-0d62-9e7b-cf09f7f5aac7@bootlin.com> (raw)
In-Reply-To: <20230511213749.j2be7po5n2vgfwmu@skbuf>
Hello Vladimir,
thanks for the fast review !
On 5/11/23 23:37, Vladimir Oltean wrote:
> On Thu, May 11, 2023 at 07:02:01PM +0200, alexis.lothore@bootlin.com wrote:
>> From: Clément Léger <clement.leger@bootlin.com>
>>
>> stp_set_state() should actually allow receiving BPDU while in LEARNING
>> mode which is not the case. Additionally, the BLOCKEN bit does not
>> actually forbid sending forwarded frames from that port. To fix this, add
>> a5psw_port_tx_enable() function which allows to disable TX. However, while
>> its name suggest that TX is totally disabled, it is not and can still
>> allow to send BPDUs even if disabled. This can be done by using forced
>> forwarding with the switch tagging mechanism but keeping "filtering"
>> disabled (which is already the case in the rzn1-a5sw tag driver). With
>> these fixes, STP support is now functional.
>>
>> Fixes: 888cdb892b61 ("net: dsa: rzn1-a5psw: add Renesas RZ/N1 advanced 5 port switch driver")
>> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
>> Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
>> ---
>
> Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
>
>> @@ -344,28 +376,35 @@ static void a5psw_port_bridge_leave(struct dsa_switch *ds, int port,
>>
>> static void a5psw_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
>> {
>> - u32 mask = A5PSW_INPUT_LEARN_DIS(port) | A5PSW_INPUT_LEARN_BLOCK(port);
>> struct a5psw *a5psw = ds->priv;
>> - u32 reg = 0;
>> + bool learning_enabled, rx_enabled, tx_enabled;
>
> Absolutely minor comment: in the networking subsystem there is a coding
> style preference to order lines with variable declarations longest to
> shortest (reverse Christmas tree). Since I don't see another less
> frivolous reason to resend the patch set, I thought I'd just mention
> for next time.
ACK. Since an error has been raised by CI bot on this series, I will send a V3
and fix this ordering too.
Regards,
--
Alexis Lothoré, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2023-05-12 6:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-11 17:01 [PATCH net v2 0/3] net: dsa: rzn1-a5psw: disabled learning for standalone ports and fix STP support alexis.lothore
2023-05-11 17:02 ` [PATCH net v2 1/3] net: dsa: rzn1-a5psw: enable management frames for CPU port alexis.lothore
2023-05-11 21:35 ` Vladimir Oltean
2023-05-12 4:19 ` kernel test robot
2023-05-11 17:02 ` [PATCH net v2 2/3] net: dsa: rzn1-a5psw: fix STP states handling alexis.lothore
2023-05-11 21:37 ` Vladimir Oltean
2023-05-12 6:33 ` Alexis Lothoré [this message]
2023-05-11 17:02 ` [PATCH net v2 3/3] net: dsa: rzn1-a5psw: disable learning for standalone ports alexis.lothore
2023-05-11 21:38 ` Vladimir Oltean
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