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[188.155.177.222]) by smtp.gmail.com with ESMTPSA id n10sm10856124wri.77.2021.06.09.04.41.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Jun 2021 04:41:35 -0700 (PDT) Subject: Re: [PATCH 1/2] clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64 To: Will Deacon , linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Marek Szyprowski , Krzysztof Kozlowski , Chanwoo Choi , Thomas Gleixner , Daniel Lezcano References: <20210608154341.10794-1-will@kernel.org> <20210608154341.10794-2-will@kernel.org> From: Krzysztof Kozlowski Message-ID: <7a3213a4-5f35-17b3-3d05-a5c6f032d1f5@canonical.com> Date: Wed, 9 Jun 2021 13:41:33 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210608154341.10794-2-will@kernel.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/06/2021 17:43, Will Deacon wrote: > All arm64 CPUs feature an architected timer, which offers a relatively > low-latency interface to a per-cpu clocksource and timer. For the most > part, using this interface is a no-brainer, with the exception of SoCs > where it cannot be used to wake up from deep idle state (i.e. > CLOCK_EVT_FEAT_C3STOP is set). > > On the contrary, the Exynos MCT is extremely slow to access yet can be > used as a wakeup source. In preparation for using the Exynos MCT as a > potential wakeup timer for the Arm architected timer, reduce its ratings > so that the architected timer is preferred. > > This effectively reverts the decision made in 6282edb72bed > ("clocksource/drivers/exynos_mct: Increase priority over ARM arch timer") > for arm64, as the reasoning for the original change was to work around > a 32-bit SoC design. > > Cc: Marek Szyprowski > Cc: Krzysztof Kozlowski > Cc: Chanwoo Choi > Cc: Thomas Gleixner > Signed-off-by: Will Deacon > --- > drivers/clocksource/exynos_mct.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c > index fabad79baafc..804d3e01c8f4 100644 > --- a/drivers/clocksource/exynos_mct.c > +++ b/drivers/clocksource/exynos_mct.c > @@ -51,6 +51,15 @@ > > #define TICK_BASE_CNT 1 > > +#ifdef CONFIG_ARM > +/* Use values higher than ARM arch timer. See 6282edb72bed. */ > +#define MCT_CLKSOURCE_RATING 450 > +#define MCT_CLKEVENTS_RATING 500 > +#else > +#define MCT_CLKSOURCE_RATING 350 > +#define MCT_CLKEVENTS_RATING 350 > +#endif > + Tested on Exynos5422 (32-bit ARM) and it seems to work. I don't have ARMv8 board to check it. We want Exynos MCT on ARMv8 as well, because unfortunately it shares the block with Arch timer. This was investigated by Marek: https://lore.kernel.org/linux-samsung-soc/20181017123622eucas1p14654c89a8590fd094d638b60ab9af8f0~eZY3j27rs0422004220eucas1p1M@eucas1p1.samsung.com/ Best regards, Krzysztof