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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id p19-20020a056402155300b0042617ba638esm823008edx.24.2022.06.01.04.23.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Jun 2022 04:23:09 -0700 (PDT) Message-ID: <7a66f2e2-1a2a-a262-138c-f535499984ae@linaro.org> Date: Wed, 1 Jun 2022 13:23:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [RFC PATCH v2 4/6] PM: opp: allow control of multiple clocks Content-Language: en-US To: Viresh Kumar Cc: Stephen Boyd , Andy Gross , Bjorn Andersson , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Viresh Kumar , Nishanth Menon , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , "Rafael J. Wysocki" , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-scsi@vger.kernel.org, Manivannan Sadhasivam References: <20220411154347.491396-1-krzysztof.kozlowski@linaro.org> <20220411154347.491396-5-krzysztof.kozlowski@linaro.org> <20220425072710.v6gwo4gu3aouezg4@vireshk-i7> <20220510044053.ykn6ygnbeokhzrsa@vireshk-i7> <1e533194-7047-8342-b426-f607fddbfaa3@linaro.org> <20220511050643.hd5tcrojb3wkbg7t@vireshk-i7> <20220518235708.1A04CC385A9@smtp.kernel.org> <65a4c28d-6702-3a9f-f837-1ea69a428777@linaro.org> <20220531103029.ntoypaafnd6447ag@vireshk-i7> From: Krzysztof Kozlowski In-Reply-To: <20220531103029.ntoypaafnd6447ag@vireshk-i7> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 31/05/2022 12:30, Viresh Kumar wrote: > On 19-05-22, 10:03, Krzysztof Kozlowski wrote: >> Yes, true. The clock frequencies are still changed with each gear, but >> in general the UFS indeed operates on gear concept. > > Hi Krzysztof, > > I have redesigned the OPP core a bit (two patchsets until now) to make > it easier to add multiple clock support going forward. I need some > inputs from you before moving forward with it now. Will this work for > your use case: > > - Add support for multiple clocks, where none of them is primary. > > - Which means you won't be able to use dev_pm_opp_set_rate() but will > need something like dev_pm_opp_set_level(), will add it. > > - That is, your OPP table will need to implement levels (I think of > them as UFS gears) and then call dev_pm_opp_set_level() instead. > > - This new API will work just like dev_pm_opp_set_rate(), except that > it will find the target OPP based on level instead of freq and > support configuration of multiple clock frequencies. > > - Of course both these APIs will share most of the code. Hi Viresh, In general this looks reasonable and matches how the UFS gears should be modeled. It does not match how UFS drivers implemented the clock scaling, but that's the internal problem of UFS drivers. They scale the clocks only max or min, even though there are multiple gears in between. The new approach looks therefore appropriate. Best regards, Krzysztof