From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030740AbaLLQfj (ORCPT ); Fri, 12 Dec 2014 11:35:39 -0500 Received: from mail-bn1bon0072.outbound.protection.outlook.com ([157.56.111.72]:33520 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S934882AbaLLQfd convert rfc822-to-8bit (ORCPT ); Fri, 12 Dec 2014 11:35:33 -0500 From: Soren Brinkmann To: Linus Walleij , Rob Herring , Pawel Moll , Mark Rutland CC: =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , Michal Simek , , , Alessandro Rubini , Heiko Stuebner , Laurent Pinchart , , , "Ivan T. Ivanov" , Bjorn Andersson , Beniamino Galvani , Ian Campbell , Kumar Gala , Grant Likely , Subject: [PATCH v3 5/7] ARM: zynq: Enable pinctrl Date: Fri, 12 Dec 2014 08:34:56 -0800 X-Mailer: git-send-email 2.2.0.1.g9ee0458 In-Reply-To: <1418402098-3811-1-git-send-email-soren.brinkmann@xilinx.com> References: <1418402098-3811-1-git-send-email-soren.brinkmann@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-7.5.0.1018-21172.000 X-TM-AS-Result: No--1.426-7.0-31-1 X-imss-scan-details: No--1.426-7.0-31-1;No--1.426-5.0-31-1 X-TM-AS-User-Approved-Sender: No;No Message-ID: <7af19dab6e804ce096e5af4654f6452c@BL2FFO11FD045.protection.gbl> X-EOPAttributedMessage: 0 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=soren.brinkmann@xilinx.com; X-Forefront-Antispam-Report: CIP:149.199.60.83;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(438002)(189002)(199003)(104016003)(89996001)(23676002)(77156002)(4396001)(50226001)(92726002)(50466002)(87936001)(21056001)(19580395003)(64706001)(20776003)(47776003)(19580405001)(120916001)(107046002)(53416004)(46102003)(74316001)(106466001)(62966003)(86362001)(92566001)(6806004)(108616004)(76176999)(229853001)(31966008)(99396003)(50986999)(129583001)(107986001)(24736002)(23106004);DIR:OUT;SFP:1101;SCL:1;SRVR:BL2FFO11HUB067;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;MLV:sfv;PTR:unknown-60-83.xilinx.com;MX:1;A:1;LANG:en; X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BL2FFO11HUB067; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BL2FFO11HUB067; X-Forefront-PRVS: 04238CD941 X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BL2FFO11HUB067; X-OriginatorOrg: xilinx.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Select pinctrl and the Zynq pinctrl driver. Signed-off-by: Soren Brinkmann Tested-by: Andreas Färber --- Changes since RFC v2: - separate mach-zynq changes in their own patch --- arch/arm/mach-zynq/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index aaa5162c1509..78e5e007f52d 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -9,6 +9,8 @@ config ARCH_ZYNQ select HAVE_ARM_TWD if SMP select ICST select MFD_SYSCON + select PINCTRL + select PINCTRL_ZYNQ select SOC_BUS help Support for Xilinx Zynq ARM Cortex A9 Platform -- 2.2.0.1.g9ee0458