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From: "Wysocki, Rafael J" <rafael.j.wysocki@intel.com>
To: Vidya Sagar <vidyas@nvidia.com>, <bhelgaas@google.com>,
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	<kai.heng.feng@canonical.com>, <enriquezmark36@gmail.com>,
	<tasev.stefanoska@skynet.be>
Cc: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<treding@nvidia.com>, <jonathanh@nvidia.com>, <kthota@nvidia.com>,
	<mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>
Subject: Re: [PATCH V2] PCI/ASPM: Skip L1SS save/restore if not already enabled
Date: Fri, 20 Jan 2023 19:41:49 +0100	[thread overview]
Message-ID: <7b4293fd-e642-9983-9d88-7a5aadaae97e@intel.com> (raw)
In-Reply-To: <20230120091540.3305-1-vidyas@nvidia.com>

On 1/20/2023 10:15 AM, Vidya Sagar wrote:
> Skip save and restore of ASPM L1 Sub-States specific registers if they
> are not already enabled in the system. This is to avoid issues observed
> on certain platforms during restoration process, particularly when
> restoring the L1SS registers contents.
>
> BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=216782
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>

It would be good if the bug reporters could test this.

When that happens, please feel free to add

Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

to it.

> ---
> v2:
> * Address review comments from Kai-Heng Feng and Rafael
>
>   drivers/pci/pcie/aspm.c | 17 ++++++++++++++++-
>   include/linux/pci.h     |  1 +
>   2 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
> index 53a1fa306e1e..bd2a922081bd 100644
> --- a/drivers/pci/pcie/aspm.c
> +++ b/drivers/pci/pcie/aspm.c
> @@ -761,11 +761,23 @@ void pci_save_aspm_l1ss_state(struct pci_dev *dev)
>   {
>   	struct pci_cap_saved_state *save_state;
>   	u16 l1ss = dev->l1ss;
> -	u32 *cap;
> +	u32 *cap, val;
>   
>   	if (!l1ss)
>   		return;
>   
> +	/*
> +	 * Skip save and restore of L1 Sub-States registers if they are not
> +	 * already enabled in the system
> +	 */
> +	pci_read_config_dword(dev, l1ss + PCI_L1SS_CTL1, &val);
> +	if (!(val & PCI_L1SS_CTL1_L1SS_MASK)) {
> +		dev->skip_l1ss_restore = true;
> +		return;
> +	}
> +
> +	dev->skip_l1ss_restore = false;
> +
>   	save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_L1SS);
>   	if (!save_state)
>   		return;
> @@ -784,6 +796,9 @@ void pci_restore_aspm_l1ss_state(struct pci_dev *dev)
>   	if (!l1ss)
>   		return;
>   
> +	if (dev->skip_l1ss_restore)
> +		return;
> +
>   	save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_L1SS);
>   	if (!save_state)
>   		return;
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 22319ea71ab0..39534602b55e 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -395,6 +395,7 @@ struct pci_dev {
>   	unsigned int	ltr_path:1;	/* Latency Tolerance Reporting
>   					   supported from root to here */
>   	u16		l1ss;		/* L1SS Capability pointer */
> +	bool		skip_l1ss_restore;	/* Skip L1SS Save/Restore */
>   #endif
>   	unsigned int	pasid_no_tlp:1;		/* PASID works without TLP Prefix */
>   	unsigned int	eetlp_prefix_path:1;	/* End-to-End TLP Prefix */

  reply	other threads:[~2023-01-20 18:42 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-19  9:49 [PATCH V1] " Vidya Sagar
2023-01-19 14:21 ` Kai-Heng Feng
2023-01-19 19:01   ` Wysocki, Rafael J
2023-01-20  9:15 ` [PATCH V2] " Vidya Sagar
2023-01-20 18:41   ` Wysocki, Rafael J [this message]
2023-02-08 23:42   ` Bjorn Helgaas
2023-02-10  0:18     ` Bjorn Helgaas
     [not found]       ` <CAKd_mfQyZ4fePBH4Rtg94g00mRoqUcmukWX1EgzwowNLzdhcSg@mail.gmail.com>
2023-02-10 13:39         ` Mark Enriquez
2023-02-10 13:56           ` Bjorn Helgaas
2023-02-10 17:47             ` Mark Enriquez

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