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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b79f4975dcesm129404466b.34.2025.12.04.05.30.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Dec 2025 05:30:41 -0800 (PST) Message-ID: <7b4bcb6e-fbb1-45f6-921e-dd1340a8cece@oss.qualcomm.com> Date: Thu, 4 Dec 2025 14:30:38 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/6] drm/msm/a6xx: Retrieve gmu core range by index To: Akhil P Oommen Cc: Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Jessica Zhang , Dan Carpenter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20251122-qcs615-spin-2-v3-0-9f4d4c87f51d@oss.qualcomm.com> <20251122-qcs615-spin-2-v3-1-9f4d4c87f51d@oss.qualcomm.com> <9cc55934-6980-4673-8501-2d1efe2f816e@oss.qualcomm.com> <936b6a48-a5e5-4efb-be7c-215ac670677d@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <936b6a48-a5e5-4efb-be7c-215ac670677d@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: KVlb-YoqhZ_tt_VvBMOaPCM3mZ-l9HV- X-Proofpoint-GUID: KVlb-YoqhZ_tt_VvBMOaPCM3mZ-l9HV- X-Authority-Analysis: v=2.4 cv=UddciaSN c=1 sm=1 tr=0 ts=69318d04 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=OZq_gVfAIbbHJCx-Pr4A:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjA0MDEwOSBTYWx0ZWRfXyBO42IN78+qN 0+ZfOwdDp3gJ+fxwuH9t49uKSwVWPD1rZ/Rjw+rHm6dYJ96qYZc/wHXII8pd4onW/S54QuOqG+G dmXiKWbRKWpeGQcBlLOP3Ej00IOvi6TZFDJsDwvL9wSDvaMVGJwlhqxs8/kcu8dem4b3RsyyYH1 X/J91GulC3Tjl8NzUaJ2ghFbR5qGooloOsknh3UuVK+n/hsEqrkANiLCTxV3oVvWbDSYgsf0R9/ QZyNYIfIFxfsJp82aWG0vFYUPxJPLUOWW9bq6tkNJ9PoochUljkz49k2OlG1B0/f9hEeuw+xoVl V34kWTwuXogIQ9YJKpTu6WvIIhXaX83aY9YbUpy9dkiRh3giQW5E2auJsNrBcaVS71EkP+eNxx9 Te555VpgzubIojIxdWAN+ogNzeQ5MQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-04_03,2025-12-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 malwarescore=0 bulkscore=0 priorityscore=1501 phishscore=0 clxscore=1015 spamscore=0 suspectscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2512040109 On 12/4/25 2:10 PM, Akhil P Oommen wrote: > On 11/22/2025 7:08 PM, Konrad Dybcio wrote: >> On 11/21/25 10:52 PM, Akhil P Oommen wrote: >>> Some GPUs like A612 doesn't use a named register range resource. This >>> is because the reg-name property is discouraged when there is just a >>> single resource. >>> >>> To address this, retrieve the 'gmu' register range by its index. It is >>> always guaranteed to be at index 0. >>> >>> Signed-off-by: Akhil P Oommen >>> --- >>> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 14 ++++++-------- >>> 1 file changed, 6 insertions(+), 8 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >>> index 5903cd891b49..9662201cd2e9 100644 >>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c >>> @@ -2029,21 +2029,19 @@ static int cxpd_notifier_cb(struct notifier_block *nb, >>> return 0; >>> } >>> >>> -static void __iomem *a6xx_gmu_get_mmio(struct platform_device *pdev, >>> - const char *name, resource_size_t *start) >>> +static void __iomem *a6xx_gmu_get_mmio(struct platform_device *pdev, resource_size_t *start) >> >> Can we drop this and just use devm_platform_get_and_ioremap_resource()? > > This API seems to lock the io region and fails with -EBUSY if the region > is already in use. I am worried it may regress other chipsets. So, I > dropped this idea at the last moment. Is there any specific platform where this would be an issue? Konrad