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From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: Alexey Klimov <alexey.klimov@linaro.org>,
	Sam Protsenko <semen.protsenko@linaro.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Peter Griffin <peter.griffin@linaro.org>,
	Alim Akhtar <alim.akhtar@samsung.com>
Cc: Thomas Turner <tturner@lineageos.org>,
	linux-samsung-soc@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] arm64: dts: exynos850: Add ACPM firmware node
Date: Tue, 29 Sep 2026 12:02:18 +0300	[thread overview]
Message-ID: <7b5dded4-c475-40dd-b5c4-5086bab4162e@linaro.org> (raw)
In-Reply-To: <20260929-exynos850-acpm-node-cpufreq-v1-1-5a86c1d404b8@linaro.org>

Hi, Alexey,

On 9/29/26 6:10 AM, Alexey Klimov wrote:
> Add the ACPM firmware node with cpucl0 and cpucl1 clocks. ACPM firmware
> protocol provides interface for all client drivers to actually use
> features exposed by the APM co-processor.
> 
> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
> ---
>  arch/arm64/boot/dts/exynos/exynos850.dtsi | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
> index 8a4771899a8e..91c6cee8f483 100644
> --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
> @@ -11,6 +11,7 @@
>   */
>  
>  #include <dt-bindings/clock/exynos850.h>
> +#include <dt-bindings/clock/samsung,exynos850-acpm.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/soc/samsung,exynos-usi.h>
>  
> @@ -170,6 +171,18 @@ timer: timer {
>  		     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
>  	};
>  
> +	firmware {
> +		acpm_ipc: power-management {
> +			compatible = "samsung,exynos850-acpm-ipc";
> +			mboxes = <&ap2apm_mailbox>;
> +			shmem = <&apm_sram>;
> +			clocks = <&cmu_cpucl0 CLK_FOUT_CPUCL0_PLL>,
> +				 <&cmu_cpucl1 CLK_FOUT_CPUCL1_PLL>;

Why do you describe these clocks?

Thanks,
ta

> +			clock-names = "cpucl0", "cpucl1";
> +			#clock-cells = <1>;
> +		};
> +	};
> +
>  	soc: soc@0 {
>  		compatible = "simple-bus";
>  		#address-cells = <1>;
> 


  reply	other threads:[~2026-09-29  9:02 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-29  3:10 [PATCH 0/2] Exynos850: Add ACPM node and enable cpufreq Alexey Klimov
2026-09-29  3:10 ` [PATCH 1/2] arm64: dts: exynos850: Add ACPM firmware node Alexey Klimov
2026-09-29  9:02   ` Tudor Ambarus [this message]
2026-09-30 11:54     ` Alexey Klimov
2026-10-01 13:27       ` Tudor Ambarus
2026-09-29  3:10 ` [PATCH 2/2] arm64: dts: exynos850: Add operating points for CPUs and enable cpufreq Alexey Klimov

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