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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-72737f96190sm1913719a34.11.2025.02.22.09.31.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 22 Feb 2025 09:31:03 -0800 (PST) Message-ID: <7b64c6a9-0606-45ba-be45-7ae11c4fdf39@baylibre.com> Date: Sat, 22 Feb 2025 11:31:01 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] iio: ad7380: add support for SPI offload To: Angelo Dureghello , Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich , =?UTF-8?Q?Nuno_S=C3=A1?= Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250220-wip-bl-spi-offload-ad7380-v1-1-838aa873e62a@baylibre.com> Content-Language: en-US From: David Lechner In-Reply-To: <20250220-wip-bl-spi-offload-ad7380-v1-1-838aa873e62a@baylibre.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 2/20/25 12:03 PM, Angelo Dureghello wrote: > From: Angelo Dureghello > > Add support for SPI offload to the ad7380 driver. SPI offload allows > sampling data at the max sample rate (2MSPS with one SDO line). > > This is developed and tested against the ADI example FPGA design for > this family of ADCs [1]. > > [1]: http://analogdevicesinc.github.io/hdl/projects/ad738x_fmc/index.html > > Signed-off-by: Angelo Dureghello > --- We forgot to also update Documentation/iio/ad7380.rst. We can follow up with a separate patch later though. > drivers/iio/adc/Kconfig | 2 + > drivers/iio/adc/ad7380.c | 509 +++++++++++++++++++++++++++++++++++++++++++---- > 2 files changed, 475 insertions(+), 36 deletions(-) > ... > #define _AD7380_CHANNEL(index, bits, diff, sign, gain) { \ > .type = IIO_VOLTAGE, \ > .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ > @@ -237,48 +335,123 @@ static const struct iio_scan_type ad7380_scan_type_16_u[] = { > .num_event_specs = ARRAY_SIZE(ad7380_events), \ > } > > +#define _AD7380_OFFLOAD_CHANNEL(index, bits, diff, sign, gain) { \ > + .type = IIO_VOLTAGE, \ > + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ > + ((gain) ? BIT(IIO_CHAN_INFO_SCALE) : 0) | \ > + ((diff) ? 0 : BIT(IIO_CHAN_INFO_OFFSET)), \ > + .info_mask_shared_by_type = ((gain) ? 0 : BIT(IIO_CHAN_INFO_SCALE)) | \ > + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) | \ > + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ Not sure if this is worth troubling with, but it might make more sense to make IIO_CHAN_INFO_SAMP_FREQ info_mask_separate instead of info_mask_shared_by_type, at least in the case of the single-ended chips. This family of chips does simultaneous conversions so shared_by_type (or shared_by_all) would typically be the right thing to do here. However, the single-ended versions of these chips also have a multiplexer, so there are 2 banks of simultaneously sampled inputs. So the effective sample rate as far as IIO is concerned would actually be 1/2 of the sampling_frequency attribute value. Since we have a channel mask restriction where we force all channels in a bank to be enabled at once, I think it would work to make IIO_CHAN_INFO_SAMP_FREQ info_mask_separate where the reported sampling frequency is the conversion rate divided by the number of channels in a bank. > + .info_mask_shared_by_type_available = \ > + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) | \ > + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ > + .indexed = 1, \ > + .differential = (diff), \ > + .channel = (diff) ? (2 * (index)) : (index), \ > + .channel2 = (diff) ? (2 * (index) + 1) : 0, \ > + .scan_index = (index), \ > + .has_ext_scan_type = 1, \ > + .ext_scan_type = ad7380_scan_type_##bits##_##sign##_offload, \ > + .num_ext_scan_type = \ > + ARRAY_SIZE(ad7380_scan_type_##bits##_##sign##_offload), \ > + .event_spec = ad7380_events, \ > + .num_event_specs = ARRAY_SIZE(ad7380_events), \ > +} > +