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[73.228.159.35]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-503b59c92ebsm1619337173.46.2025.07.07.05.19.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Jul 2025 05:19:46 -0700 (PDT) Message-ID: <7bdbef20-da43-4b23-9ae2-a0cf077fec92@riscstar.com> Date: Mon, 7 Jul 2025 07:19:45 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] clk: spacemit: mark K1 pll1_d8 as critical To: mturquette@baylibre.com, sboyd@kernel.org Cc: dlan@gentoo.org, heylenay@4d2.org, inochiama@outlook.com, guodong@riscstar.com, linux-clk@vger.kernel.org, spacemit@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20250612224856.1105924-1-elder@riscstar.com> Content-Language: en-US From: Alex Elder In-Reply-To: <20250612224856.1105924-1-elder@riscstar.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 6/12/25 5:48 PM, Alex Elder wrote: > The pll1_d8 clock is enabled by the boot loader, and is ultimately a > parent for numerous clocks, including those used by APB and AXI buses. > Guodong Xu discovered that this clock got disabled while responding to > getting -EPROBE_DEFER when requesting a reset controller. > > The needed clock (CLK_DMA, along with its parents) had already been > enabled. To respond to the probe deferral return, the CLK_DMA clock > was disabled, and this led to parent clocks also reducing their enable > count. When the enable count for pll1_d8 was decremented it became 0, > which caused it to be disabled. This led to a system hang. > > Marking that clock critical resolves this by preventing it from being > disabled. > > Define a new macro CCU_FACTOR_GATE_DEFINE() to allow clock flags to > be supplied for a CCU_FACTOR_GATE clock. Is there any reason this bug fix cannot be merged? It was first posted a month ago, and although there was some initial discussion that led to revisions, this version has been waiting for over three weeks. -Alex > > Fixes: 1b72c59db0add ("clk: spacemit: Add clock support for SpacemiT K1 SoC") > Signed-off-by: Alex Elder > Tested-by: Guodong Xu > Reviewed-by: Haylen Chu > --- > v3: Define struct with static scope; added Haylen's Reviewed-by > v2: Reworded the description to provide better detail > > drivers/clk/spacemit/ccu-k1.c | 3 ++- > drivers/clk/spacemit/ccu_mix.h | 21 +++++++++++++-------- > 2 files changed, 15 insertions(+), 9 deletions(-) > > diff --git a/drivers/clk/spacemit/ccu-k1.c b/drivers/clk/spacemit/ccu-k1.c > index cdde37a052353..df65009a07bb1 100644 > --- a/drivers/clk/spacemit/ccu-k1.c > +++ b/drivers/clk/spacemit/ccu-k1.c > @@ -170,7 +170,8 @@ CCU_FACTOR_GATE_DEFINE(pll1_d4, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(3), 4, > CCU_FACTOR_GATE_DEFINE(pll1_d5, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(4), 5, 1); > CCU_FACTOR_GATE_DEFINE(pll1_d6, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(5), 6, 1); > CCU_FACTOR_GATE_DEFINE(pll1_d7, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(6), 7, 1); > -CCU_FACTOR_GATE_DEFINE(pll1_d8, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(7), 8, 1); > +CCU_FACTOR_GATE_FLAGS_DEFINE(pll1_d8, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(7), 8, 1, > + CLK_IS_CRITICAL); > CCU_FACTOR_GATE_DEFINE(pll1_d11_223p4, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(15), 11, 1); > CCU_FACTOR_GATE_DEFINE(pll1_d13_189, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(16), 13, 1); > CCU_FACTOR_GATE_DEFINE(pll1_d23_106p8, CCU_PARENT_HW(pll1), APBS_PLL1_SWCR2, BIT(20), 23, 1); > diff --git a/drivers/clk/spacemit/ccu_mix.h b/drivers/clk/spacemit/ccu_mix.h > index 51d19f5d6aacb..54d40cd39b275 100644 > --- a/drivers/clk/spacemit/ccu_mix.h > +++ b/drivers/clk/spacemit/ccu_mix.h > @@ -101,16 +101,21 @@ static struct ccu_mix _name = { \ > } \ > } > > +#define CCU_FACTOR_GATE_FLAGS_DEFINE(_name, _parent, _reg_ctrl, _mask_gate, _div, \ > + _mul, _flags) \ > +static struct ccu_mix _name = { \ > + .gate = CCU_GATE_INIT(_mask_gate), \ > + .factor = CCU_FACTOR_INIT(_div, _mul), \ > + .common = { \ > + .reg_ctrl = _reg_ctrl, \ > + CCU_MIX_INITHW(_name, _parent, spacemit_ccu_factor_gate_ops, _flags) \ > + } \ > +} > + > #define CCU_FACTOR_GATE_DEFINE(_name, _parent, _reg_ctrl, _mask_gate, _div, \ > _mul) \ > -static struct ccu_mix _name = { \ > - .gate = CCU_GATE_INIT(_mask_gate), \ > - .factor = CCU_FACTOR_INIT(_div, _mul), \ > - .common = { \ > - .reg_ctrl = _reg_ctrl, \ > - CCU_MIX_INITHW(_name, _parent, spacemit_ccu_factor_gate_ops, 0) \ > - } \ > -} > + CCU_FACTOR_GATE_FLAGS_DEFINE(_name, _parent, _reg_ctrl, _mask_gate, _div, \ > + _mul, 0) > > #define CCU_MUX_GATE_DEFINE(_name, _parents, _reg_ctrl, _shift, _width, \ > _mask_gate, _flags) \ > > base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494