From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752346AbdC0KYv (ORCPT ); Mon, 27 Mar 2017 06:24:51 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:3716 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751959AbdC0KYk (ORCPT ); Mon, 27 Mar 2017 06:24:40 -0400 Subject: Re: [PATCH 2/8] pinctrl: stm32: use gpio-ranges to declare bank range To: Linus Walleij References: <1485533721-9019-1-git-send-email-alexandre.torgue@st.com> <1485533721-9019-3-git-send-email-alexandre.torgue@st.com> <2d0cd144-9a72-52d5-b2c9-c6c9e09ac494@st.com> CC: Maxime Coquelin , Rob Herring , Mark Rutland , Arnd Bergmann , Russell King , Olof Johansson , Patrice Chotard , Lee Jones , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" From: Alexandre Torgue Message-ID: <7be9d251-f177-ce15-9d91-d8533ddffa06@st.com> Date: Mon, 27 Mar 2017 12:23:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG6NODE3.st.com (10.75.127.18) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-03-27_09:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Linus On 02/01/2017 04:01 PM, Linus Walleij wrote: > On Mon, Jan 30, 2017 at 5:29 PM, Alexandre Torgue > wrote: >> On 01/30/2017 04:19 PM, Linus Walleij wrote: > >>>> + if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, >>>> &args)) >>>> + bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK; >>>> + else { >>>> + range->name = bank->gpio_chip.label; >>>> + range->id = bank_nr; >>>> + range->pin_base = range->id * STM32_GPIO_PINS_PER_BANK; >>>> + range->base = range->id * STM32_GPIO_PINS_PER_BANK; >>>> + range->npins = npins; >>>> + range->gc = &bank->gpio_chip; >>>> + pinctrl_add_gpio_range(pctl->pctl_dev, >>>> + &pctl->banks[bank_nr].range); >>>> + } >> >> >> I Keep the old way to get range in order to keep compatibility with older >> device tree (if no gpio ranges are defined). > > Aha I understand. Sorry for my stupidity. > > Go ahead with this! I saw an issue about this patch. It doesn't seem to be merged, so I will send a V2 only for this patch. Regards Alex > > Yours, > Linus Walleij >