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([2600:8803:e7e4:1d00:aa9f:f4cd:76b1:fecb]) by smtp.gmail.com with ESMTPSA id 5614622812f47-437968f6394sm1522294b6e.28.2025.08.26.08.17.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 Aug 2025 08:17:18 -0700 (PDT) Message-ID: <7c013171-784d-4acc-b662-189ef568cb1f@baylibre.com> Date: Tue, 26 Aug 2025 10:17:17 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] iio: adc: ad7124: add external clock support To: Andy Shevchenko Cc: Michael Hennerich , Jonathan Cameron , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250825-iio-adc-ad7124-proper-clock-support-v2-0-4dcff9db6b35@baylibre.com> <20250825-iio-adc-ad7124-proper-clock-support-v2-3-4dcff9db6b35@baylibre.com> Content-Language: en-US From: David Lechner In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 8/26/25 3:10 AM, Andy Shevchenko wrote: > On Tue, Aug 26, 2025 at 1:55 AM David Lechner wrote: >> >> Add support for an external clock source to the AD7124 ADC driver. >> >> Previously, the driver only supported using the internal clock and had >> bad devicetree bindings that used a fake clock to essentially select >> the power mode. This is preserved for backwards compatibility. >> >> If the clock is not named "mclk", then we know that the devicetree is >> using the correct bindings and we can configure the chip to use an >> external clock source rather than internal. >> >> Also drop a redundant comment when configuring the register fields >> instead of adding more. > > ... > >> + /* >> + * The external clock may be 4x the nominal clock rate, >> + * in which case the ADC needs to be configured to >> + * divide it by 4. Using MEGA is a bit arbitrary, but >> + * the expected clock rates are either 614.4 kHz or >> + * 2.4576 MHz, so this should work. >> + */ >> + if (clk_hz > MEGA) > > This is (1 * HZ_PER_MHZ), but as the comment says, this arbitrary > check may be improved by using the exact values. The datasheet wasn't clear if an exact value was required or if there was some tolerance, so this is why I didn't try comparing to exact values. > >> + clk_sel = AD7124_ADC_CONTROL_CLK_SEL_EXT_DIV4; >> + else >> + clk_sel = AD7124_ADC_CONTROL_CLK_SEL_EXT; >