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charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: iu54yLGlY-FBlVwTxvK7s9RfZNa20aMB X-Authority-Analysis: v=2.4 cv=Q/TS452a c=1 sm=1 tr=0 ts=6895c1b6 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=wbLa1xrU48ZvrQgpvw4A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: iu54yLGlY-FBlVwTxvK7s9RfZNa20aMB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODA2MDA5MCBTYWx0ZWRfX1vbdhQ9c/B53 p0j/1Cdd12hjWMV+0n1K6AEW1gyKWncocykcIgB7AMnB+bN5dsw6q5cwVzwuA+Uq/f7xvBEbUs5 K5SWc6oZn9/37/aMI9V1e+dr00R1olqGh/RY05OOdZamkUpiofNbYt0cv/gcMpvI+29xm0XJ32p LVa/46edkFc1OwYw4v76XWWJYXU7PeaANzeMrULsUgqjw7xlk5ImkkR/2luG/CWf/n3CWkN9f0r Bl5nG06KfeSHwC54Sfgp1q6eoGSlhxXIY17hEnRWfx6Z9/HEhrwSqAROk3C/MkUnpZvTKxtb1JA PqgmWIikm5GAGm34Pxp27uEtJWcdRW+VIcoynw3d9fId9K5T0dLA6/4Iu+lYA4Fbec4VwUTQJWB yfZn2IGw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-08_02,2025-08-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 clxscore=1015 suspectscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508060090 On 8/7/2025 10:32 PM, Konrad Dybcio wrote: > On 8/6/25 11:39 AM, Taniya Das wrote: >> >> >> On 8/6/2025 3:00 PM, Konrad Dybcio wrote: >>> On 8/6/25 11:27 AM, Taniya Das wrote: >>>> >>>> >>>> On 8/5/2025 10:52 AM, Dmitry Baryshkov wrote: >>>>> On Mon, Aug 04, 2025 at 11:59:21PM +0530, Taniya Das wrote: >>>>>> gcc_sdcc2_apps_clk_src: rcg didn't update its configuration" during >>>>>> boot. This happens due to the floor_ops tries to update the rcg >>>>>> configuration even if the clock is not enabled. >>>>> >>>>> This has been working for other platforms (I see Milos, SAR2130P, >>>>> SM6375, SC8280XP, SM8550, SM8650 using shared ops, all other platforms >>>>> seem to use non-shared ops). What's the difference? Should we switch all >>>>> platforms? Is it related to the hypervisor? >>>>> >>>> >>>> If a set rate is called on a clock before clock enable, the >>> >>> Is this something we should just fix up the drivers not to do? >>> >> >> I do not think CCF has any such limitation where the clock should be >> enabled and then a clock rate should be invoked. We should handle it >> gracefully and that is what we have now when the caching capabilities >> were added in the code. This has been already in our downstream drivers. > > Should we do CFG caching on *all* RCGs to avoid having to scratch our > heads over which ops to use with each clock individually? > Yes, Konrad, that’s definitely the cleanest approach. If you're okay with it, we can proceed with the current change first and then follow up with a broader cleanup of the rcg2 ops. As part of that, we can also transition the relevant SDCC clock targets to use floor_ops. This way, we can avoid the rcg configuration failure logs in the boot sequence on QCS615. >> >> We can add the fix to do a check 'clk_hw_is_enabled(hw)' in the normal >> rcg2_ops/rcg2_floor/ceil_ops as well, then we can use them. > > FWIW this is not the first time this issue has popped up.. > > I don't remember the details other than what I sent in the thread > > https://lore.kernel.org/linux-arm-msm/20240427-topic-8450sdc2-v1-1-631cbb59e0e5@linaro.org/ > Yes, but as I mentioned the new ops looks much cleaner, so wanted to take this approach. > Konrad >> >> AFAIK the eMMC framework has this code and this is not limited to drivers. >> > -- Thanks, Taniya Das