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Fri, 30 Apr 2021 13:07:56 +0000 Received: from [10.20.22.163] (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 30 Apr 2021 13:07:54 +0000 Subject: Re: [RFC 1/2] vfio/pci: keep the prefetchable attribute of a BAR region in VMA To: Marc Zyngier CC: Alex Williamson , Will Deacon , Catalin Marinas , "Christoffer Dall" , , , , , Vikram Sethi , Jason Sequeira References: <20210429162906.32742-1-sdonthineni@nvidia.com> <20210429162906.32742-2-sdonthineni@nvidia.com> <20210429122840.4f98f78e@redhat.com> <470360a7-0242-9ae5-816f-13608f957bf6@nvidia.com> <20210429134659.321a5c3c@redhat.com> <87czucngdc.wl-maz@kernel.org> From: Shanker R Donthineni Message-ID: <7c685ae6-938b-9d99-20e6-f51398543441@nvidia.com> Date: Fri, 30 Apr 2021 08:07:46 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <87czucngdc.wl-maz@kernel.org> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Content-Language: en-US X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: cedf8ce0-3549-4e80-a7a9-08d90bd8f8a9 X-MS-TrafficTypeDiagnostic: BN8PR12MB4980: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2021 13:07:56.1305 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cedf8ce0-3549-4e80-a7a9-08d90bd8f8a9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB4980 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marc, On 4/30/21 6:47 AM, Marc Zyngi >>>> We've two concerns here: >>>> - Performance impacts for pass-through devices. >>>> - The definition of ioremap_wc() function doesn't match the host >>>> kernel on ARM64 >>> Performance I can understand, but I think you're also using it to mask >>> a driver bug which should be resolved first. Thank >> We’ve already instrumented the driver code and found the code path >> for the unaligned accesses. We’ll fix this issue if it’s not >> following WC semantics. >> >> Fixing the performance concern will be under KVM stage-2 page-table >> control. We're looking for a guidance/solution for updating stage-2 >> PTE based on PCI-BAR attribute. > Before we start discussing the *how*, I'd like to clearly understand > what *arm64* memory attributes you are relying on. We already have > established that the unaligned access was a bug, which was the biggest > argument in favour of NORMAL_NC. What are the other requirements? > We are  relying  on NORMAL_NC mapping for PCI prefetchable BARs instead of DEVICE_nGnRE in baremetal and VM. No other requirement other than this. -Shanker