From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56231C43217 for ; Fri, 21 Oct 2022 13:56:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231215AbiJUN4D (ORCPT ); Fri, 21 Oct 2022 09:56:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230497AbiJUNz7 (ORCPT ); Fri, 21 Oct 2022 09:55:59 -0400 Received: from mail-qt1-x829.google.com (mail-qt1-x829.google.com [IPv6:2607:f8b0:4864:20::829]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6029A24989E for ; Fri, 21 Oct 2022 06:55:57 -0700 (PDT) Received: by mail-qt1-x829.google.com with SMTP id f22so1661857qto.3 for ; Fri, 21 Oct 2022 06:55:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=atOz8/XRKPnbyJLTPMaDXLOO7wN9bymw4gIbszWubUs=; b=UGaWLB6j8OxVe8dmmcIYNQnaOlpI+0eXu8BajNHD+ZMG4qzneObyu7rcUSIOi1ZUyv dYZtPdUG3VVmdsaxuvlXK78Ywy3c7nDrO67d1tfVEv0zq0uzHe4C8c8T/vOlljUe5Osr W050SZtwN9P7wkAea8/zllXsPavR27kWRVR8wC1dzNqXrqFOayIPUNPXWTn1SE8Dh/Ud 0IjrnoiwKi5Dvq1Fvo2hod6lQ1Yjaa3D15s5MRZDDV+7OKM11BzUm+CsTaUz5l941+jT YPejLlRpQWjgJRMYEkyXEurngD0pP5Ok1BQU5chbCLayFYSBEb6M7l7Gu+ANz+k3j6EN uutQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=atOz8/XRKPnbyJLTPMaDXLOO7wN9bymw4gIbszWubUs=; b=DmseiSXybdmd4OQ3NaaeLH12R3BwiYN7UxbuJ8jhxUYvY1gPEID+BkalgCN2zx+x/P IczugwvWLmUYytU5awjibM2cwJ+pOhplgpaBVfIELfb5PbtSmgIjwT3WbPDme68Q9Bwz e+Yt5Dv/8Jh0BnHcsbimRzvBEtdM5dJkPkSXgBcSewAuOy4TNjPDnZIVWDgWjJyIJgj0 d6GPOk31FPzFAMSasU27rwQD3lyVfjA8Ee+ccpsFHdqcV6h3W3Kiq5/j8z9VJcXJB8JY AR+BGUAjDstwRQOASZ3b8SE9FOS2HjOdkyqO0FV3oUm8D0nPieRvIwtuqABVQGn4cE2l C5tw== X-Gm-Message-State: ACrzQf248LdX76ipt84bn97X4nMuubqqEQxHJrWu2uTAK2INDtP4RwzC dCD141ghackWQFO9PtDEV1+qkQ== X-Google-Smtp-Source: AMsMyM7aTcTuZ74sxriHigv1CN8feEtvci/u09fLiaGKZ0olJSVSsi6r6gwV45XGCsHeYNqSA7mHww== X-Received: by 2002:ac8:578b:0:b0:39c:f006:3563 with SMTP id v11-20020ac8578b000000b0039cf0063563mr16081124qta.636.1666360556530; Fri, 21 Oct 2022 06:55:56 -0700 (PDT) Received: from [192.168.10.124] (pool-72-83-177-149.washdc.east.verizon.net. [72.83.177.149]) by smtp.gmail.com with ESMTPSA id y9-20020a05620a25c900b006ed61f18651sm9980834qko.16.2022.10.21.06.55.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Oct 2022 06:55:55 -0700 (PDT) Message-ID: <7c6f47ea-5dc8-6662-eeed-81bb14ed3102@linaro.org> Date: Fri, 21 Oct 2022 09:55:53 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.0 Subject: Re: [PATCH v4 1/4] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states Content-Language: en-US To: Amjad Ouled-Ameur , Kevin Hilman , Jerome Brunet , Rob Herring , Martin Blumenstingl , Neil Armstrong , Krzysztof Kozlowski , Mark Brown Cc: linux-amlogic@lists.infradead.org, Da Xue , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20221004-up-aml-fix-spi-v4-0-0342d8e10c49@baylibre.com> <20221004-up-aml-fix-spi-v4-1-0342d8e10c49@baylibre.com> From: Krzysztof Kozlowski In-Reply-To: <20221004-up-aml-fix-spi-v4-1-0342d8e10c49@baylibre.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/10/2022 09:31, Amjad Ouled-Ameur wrote: > SPI pins of the SPICC Controller in Meson-GX needs to be controlled by > pin biais when idle. Therefore define three pinctrl names: > - default: SPI pins are controlled by spi function. > - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled > by spi function. > - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled > by spi function. > > Reported-by: Da Xue > Signed-off-by: Neil Armstrong > Signed-off-by: Amjad Ouled-Ameur Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof