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From: "stephane eranian" <eranian@googlemail.com>
To: "Ingo Molnar" <mingo@elte.hu>
Cc: linux-kernel@vger.kernel.org,
	"Andrew Morton" <akpm@linux-foundation.org>,
	ak@suse.de, tglx@linutronix.de
Subject: Re: [PATCH 0/3] perfmon x86 infrastructure definitions (take 2)
Date: Tue, 11 Mar 2008 09:37:16 -0700	[thread overview]
Message-ID: <7c86c4470803110937u7e4625d8ubc6250b7ba730f2b@mail.gmail.com> (raw)
In-Reply-To: <20080310075251.GA17657@elte.hu>

Ingo,

Thanks. Will send the PCI id patch to Greg KH.


On Mon, Mar 10, 2008 at 12:52 AM, Ingo Molnar <mingo@elte.hu> wrote:
>
>  * stephane eranian <eranian@googlemail.com> wrote:
>
>  > Hello,
>  >
>  > Take 2: correct titles and no attachment.
>
>  note, all the patches were whitespace damaged (all tabs were spaces). I
>  fixed this up by hand but please check Documentation/email-clients.txt.
>
>
>  > Here is a small set of patches for x86. They are used by perfmon but
>  > they can be applied independently.
>  >
>  > patch 1: adds cpu_has_arch_perfmon to cpufeature macros to test for
>  > architectural perfmon  on Intel processors
>  > patch 2: adds AMD Northbridge config MSR definition
>  > patch 3: adds AMD Northbridge PCI Id
>
>  i've added all three to x86.git for convenience, but the PCI ID will
>  need to go via Greg KH's PCI tree i suspect.
>
>         Ingo
>

      reply	other threads:[~2008-03-11 16:37 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-03-07 21:05 stephane eranian
2008-03-10  7:52 ` Ingo Molnar
2008-03-11 16:37   ` stephane eranian [this message]

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