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Thu, 10 Dec 2020 17:08:27 +0000 From: Tom Lendacky To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org Cc: Paolo Bonzini , Jim Mattson , Joerg Roedel , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Borislav Petkov , Ingo Molnar , Thomas Gleixner , Brijesh Singh Subject: [PATCH v5 06/34] KVM: x86: Mark GPRs dirty when written Date: Thu, 10 Dec 2020 11:06:50 -0600 Message-Id: <7ca2a1cdb61456f2fe9c64193e34d601e395c133.1607620037.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: CH2PR03CA0003.namprd03.prod.outlook.com (2603:10b6:610:59::13) To CY4PR12MB1352.namprd12.prod.outlook.com (2603:10b6:903:3a::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by CH2PR03CA0003.namprd03.prod.outlook.com (2603:10b6:610:59::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3654.12 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?us-ascii?Q?i7IAL47yuFq5kkGQWAdWFv+WRphw8lMLvN2aICliUUlUTKo/ZmqHnk9+31C4?= =?us-ascii?Q?jDDSxPVhb98c4gy/rI1Tz3FopcgxaY/MKbRVNzzHyeSZUpXrNVnmnAI/AhO3?= =?us-ascii?Q?4XszJ0wUWkyPFKNnvwvP6xJc1d1ukb9/EPKaRRG1/dbGSoWKtaQKIruRUejx?= =?us-ascii?Q?aLn6bSG1W94kVbSsc+QNvr7sTFjm5hvxOleaE9+XdhOA1L7siufjKxUVsNj4?= =?us-ascii?Q?S1yRlwvXHzzCtHozWHjYiBk0PTufk4C/0mYiUA1Z9a2/yXLRRBRcNh+HSAX8?= =?us-ascii?Q?NC+aaeQvlInculHizkJDA7nWoECZRryfoEqagEocJyQsiqIGQRok2gD4+a7s?= =?us-ascii?Q?V3E5g1yngAwQbCdp1nfovR5dc3cN/dsfqrw7pI2r+LGQdYiR5nSjGtLcdwsY?= =?us-ascii?Q?VKaTErvfVVy8utIP3/obVOvkPsZp3cVP2mJ1884IlYiQ+8AlymQEtJNQ8SIs?= =?us-ascii?Q?fDNli8PBeLabmVym/Dgp5VBfmU1nP4gvD44TUI1yOrhEhlj1AglQP4b9OgiB?= =?us-ascii?Q?VZBPt3aoXBB179CXuDN1db3JqKLSnh8Ma/z7yu3RRipp0pKf2zcNYaDN715f?= =?us-ascii?Q?LUsA70ZB6b/UxvbHwm7OFh0JieotzUlW7dXkMSBkIcasIm6jOJFCxsTcc3yK?= =?us-ascii?Q?tkv58MSpwGmo4zDQasMePS49OiHlI3BTBdJHI+JWGOm4Yt5z7ZjOBaCp3FLO?= =?us-ascii?Q?CC0vsmuIdSEXp2exbK0UNMuKBkbRf5NiiciRJhhaLQS+1Ask2cUQGQ3viWBI?= =?us-ascii?Q?qTFM9RHdpy4M4x78jqSPKEX4+FFIrQU9HsLpnSFKU1rZaG+xCBnxrphGINIL?= =?us-ascii?Q?CbIdIujpeqY9mpIX96Lx9zC4rle87JhdfZqrYDl8ddrOl0adX+xwUXzaedGV?= =?us-ascii?Q?xi+pgvPn4lqY/Pi8A53qKY9DTejomJ6frA7OV15ypDRa71IZVxpEDxmtgTgf?= =?us-ascii?Q?sdJIOz+ylraGO1tfGJKcP2cBbLGDSiN7TpuVInXRGiC157R2uZlUcXWP+yug?= =?us-ascii?Q?V5kU?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthSource: CY4PR12MB1352.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Dec 2020 17:08:27.4895 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-Network-Message-Id: e6ecac00-19e0-437c-9aea-08d89d2e362c X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2CFBPdGDWGeiFNzy3Hgf9c8rjhJNY21sqIHazmLpbAuDpFlJT9BSYPlhtoEa8OCnZcL7LhR1DAW/BbRJmNHmuA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR12MB1493 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tom Lendacky When performing VMGEXIT processing for an SEV-ES guest, register values will be synced between KVM and the GHCB. Prepare for detecting when a GPR has been updated (marked dirty) in order to determine whether to sync the register to the GHCB. Signed-off-by: Tom Lendacky --- arch/x86/kvm/kvm_cache_regs.h | 51 ++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 25 deletions(-) diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h index a889563ad02d..f15bc16de07c 100644 --- a/arch/x86/kvm/kvm_cache_regs.h +++ b/arch/x86/kvm/kvm_cache_regs.h @@ -9,6 +9,31 @@ (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \ | X86_CR4_OSXMMEXCPT | X86_CR4_PGE | X86_CR4_TSD | X86_CR4_FSGSBASE) +static inline bool kvm_register_is_available(struct kvm_vcpu *vcpu, + enum kvm_reg reg) +{ + return test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); +} + +static inline bool kvm_register_is_dirty(struct kvm_vcpu *vcpu, + enum kvm_reg reg) +{ + return test_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); +} + +static inline void kvm_register_mark_available(struct kvm_vcpu *vcpu, + enum kvm_reg reg) +{ + __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); +} + +static inline void kvm_register_mark_dirty(struct kvm_vcpu *vcpu, + enum kvm_reg reg) +{ + __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); + __set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); +} + #define BUILD_KVM_GPR_ACCESSORS(lname, uname) \ static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\ { \ @@ -18,6 +43,7 @@ static __always_inline void kvm_##lname##_write(struct kvm_vcpu *vcpu, \ unsigned long val) \ { \ vcpu->arch.regs[VCPU_REGS_##uname] = val; \ + kvm_register_mark_dirty(vcpu, VCPU_REGS_##uname); \ } BUILD_KVM_GPR_ACCESSORS(rax, RAX) BUILD_KVM_GPR_ACCESSORS(rbx, RBX) @@ -37,31 +63,6 @@ BUILD_KVM_GPR_ACCESSORS(r14, R14) BUILD_KVM_GPR_ACCESSORS(r15, R15) #endif -static inline bool kvm_register_is_available(struct kvm_vcpu *vcpu, - enum kvm_reg reg) -{ - return test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); -} - -static inline bool kvm_register_is_dirty(struct kvm_vcpu *vcpu, - enum kvm_reg reg) -{ - return test_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); -} - -static inline void kvm_register_mark_available(struct kvm_vcpu *vcpu, - enum kvm_reg reg) -{ - __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); -} - -static inline void kvm_register_mark_dirty(struct kvm_vcpu *vcpu, - enum kvm_reg reg) -{ - __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail); - __set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty); -} - static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg) { if (WARN_ON_ONCE((unsigned int)reg >= NR_VCPU_REGS)) -- 2.28.0