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Tue, 27 Oct 2026 04:27:23 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b4459713f9sm4946374a12.16.2026.10.27.04.27.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Oct 2026 04:27:22 -0700 (PDT) Message-ID: <7ce4f890-8850-4217-89e8-cbda80b2a5f6@oss.qualcomm.com> Date: Tue, 27 Oct 2026 12:27:19 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 5/5] drm/msm/a6xx: Protect the 0x1c800-0x1e7ff GMU range on A620 and A650 To: patches@brar.si, Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Akhil P Oommen Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261027-adreno-a620-v4-0-b0095e028c76@brar.si> <20261027-adreno-a620-v4-5-b0095e028c76@brar.si> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261027-adreno-a620-v4-5-b0095e028c76@brar.si> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI3MDA0NSBTYWx0ZWRfXzNzlkSYrFuzD JOC9FKr9izxMyuNh//lofQWGEuv7+wJRMe9y5hXcvNZzon7XE2nqdh5duCM0SfyZITaFJX7w2sG +wxEdlxt7L0LMmUwwDtC5xyivrU5Qkg= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI3MDA0NSBTYWx0ZWRfX1GwD6fcx63Ii S9ZRmc1UuXHYoTlYGm4N4EbB5CDjidmiRqtK86B5ss5RcVdtHdknq+JGFK0uSQvyf2HW2RjwYvF 5MzAvvhMcjBkk+HhSW23H9FBD4tLbThGslwNbM4eDMfGSznu7Uu+kR3a+MBjCagn/9ZydN0BYfh zOBR9Zv2ncfZP/9lwLUNBOkyGNbbpxGM44vOdJ3lk1uPGoOLatn3lh6rG6rEWSr27mSaFoDN81z OMrqLqdfHj0NRNlNF1TE1m+0H4M3sFt2qy4Iyq2Or/JksWDg6JLYn7Om9LRlJyplCs+v1/LjsDp W4SbHL9/T4JHyi4d5sjBJt+QA+tqFiUa9GYv9n2Vji0ejdurAfVjkmPvL80tBLfuvvpXt61MGq7 bLM85GWpWrpYj3l56zUcNbxHhNW1M5R1bbKB5dqNGyhGqbanaKYBgJQoHpqR+4zbu7xVQZ72NnB gkZ2E7a9fscg6ggM+WQ== X-Proofpoint-ORIG-GUID: zamkoocyN1PGmjRSBO14zqhkwweovgmO X-Proofpoint-GUID: zamkoocyN1PGmjRSBO14zqhkwweovgmO X-Authority-Analysis: v=2.4 cv=XaIcX455 c=1 sm=1 tr=0 ts=6ae08a9d cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=Tm8wa4UmF2Ix6aBE:21 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=-zc-H5WaXjtm9W6SF9YA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-27_02,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 spamscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 suspectscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610270045 On 10/27/26 8:14 AM, Ishu Brar via B4 Relay wrote: > From: Ishu Brar > > No protect entry covers the range from 0x1c800 to 0x1e7ff: the entry > at 0x1a800 ends at 0x1c7ff and the next one starts at 0x1f400. The range > holds GMU registers, among them GMU_NMI_CONTROL_STATUS (0x1cbf0), > GMU_BOOT_SLUMBER_OPTION (0x1cbf8), the GX and MX vote indexes (0x1cbf9, > 0x1cbfa), the DCVS option, setting and return registers (0x1cbfc to > 0x1cbff) and GMU_CORE_FW_VERSION (0x1d3f8), see a6xx_gmu.xml. > > Add the range as no read/write to the A650 protect list, which A620 and > A650 share, so that these registers are reserved as well. This follows > Konrad Dybcio's suggestion; the downstream kgsl protect table of the > OnePlus Nord (a620_protected_regs) has no entry for this range, so there > is no downstream reference for it. > > The list is also used by A621, A623, A702 and A704, which I could not > test. Tested on A620 only (OnePlus Nord, a 7.3 based tree): a Vulkan > workload ran across GPU frequency changes without protect, fault or GMU > errors. A write into the range being rejected was not tested. > > Suggested-by: Konrad Dybcio > Signed-off-by: Ishu Brar > --- Reviewed-by: Konrad Dybcio Konrad