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Wed, 19 Aug 2026 05:51:43 -0700 (PDT) X-Received: by 2002:a05:6a00:2988:b0:851:c1ba:7aa6 with SMTP id d2e1a72fcca58-851d3953697mr7335663b3a.11.1787143902490; Wed, 19 Aug 2026 05:51:42 -0700 (PDT) Received: from [10.218.33.224] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-851d3671af8sm603932b3a.56.2026.08.19.05.51.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Aug 2026 05:51:42 -0700 (PDT) Message-ID: <7ce6df04-474b-4c68-a878-32f4df89a973@oss.qualcomm.com> Date: Wed, 19 Aug 2026 18:21:18 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/6] dt-bindings: iommu: arm,smmu: Document interconnects property To: Dmitry Baryshkov Cc: Bjorn Andersson , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Rob Clark , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Krzysztof Kozlowski References: <20260706-smmu_interconnect_addition-v3-0-afdca0125a65@oss.qualcomm.com> <20260706-smmu_interconnect_addition-v3-1-afdca0125a65@oss.qualcomm.com> <4e266d45-ee88-42f8-91da-6253927686ae@oss.qualcomm.com> <9f31bf3d-3c7d-45ba-bc25-e6349f689b70@oss.qualcomm.com> <328b2179-3284-40fe-808e-b1bbda322e1d@oss.qualcomm.com> Content-Language: en-US From: Bibek Kumar Patro In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=FIorAeos c=1 sm=1 tr=0 ts=6a85a6e0 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=JvE9p03Ddw1cDLIj5dgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODE5MDEwMCBTYWx0ZWRfX6qYXydNs3Smc qj3o5sSP9UpH9RWpWSxUvaBsXBQyIn57bqU19fpD4H+4jsFoGHe/pGkT5ZdGE+ZDEhlr6I87SDN 7hsMtFuQBmGgvFHn24R9lTUgzDfzulY= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODE5MDEwMCBTYWx0ZWRfXwP4YJ0sdS/7K LDFHrFMGeObtTF1ERXQq3Mm/xW/DfaOKY7A97HiJ+k35GNDNTx3eNVNK6TgMiIW0bxoNw0nTh9Y dfp7Yy9ooMtjgxO78tJyS6OQZoNH7JycdFhogVbF6rpfSbdNMtkCmrjLLxMZ6ki1wS+srG6Fr/5 MWxOaxIHxtLUuJu83BdBNHeFrFLolPKrzEXSeOVSNBROQyg9dcBS0eKM5GsJzBt1yQ/PvC3TDop YCbcishTk3FIc+su/mD8N8RuDt4hDLww6b9hGGVUmccaNqbB69lhbLmCX7uPEiTYFencN0V+8wf QZMXGu/t1qwbbWWEA5kGDLK9DIwe8zZrmihI/fvSmovdKirKxQPs57djX54f15YBGSr7Tsbl3JC TVIoXCgh/OH21PqDtJcP3HHhfZFslNVarUQg+zCynHUnDpuFZoM1yr3MUinCqfNBxYnsOkVyaVe IWbL+joUjiBnu0mkb2A== X-Proofpoint-GUID: Xn6q1AR_lNDHj_poNYOWWvDIqhXl9hFu X-Proofpoint-ORIG-GUID: Xn6q1AR_lNDHj_poNYOWWvDIqhXl9hFu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-19_03,2026-08-19_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 adultscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 impostorscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608190100 On 8/18/2026 5:53 AM, Dmitry Baryshkov wrote: > On Tue, Aug 11, 2026 at 08:39:41PM +0530, Bibek Kumar Patro wrote: >> >> >> On 7/20/2026 8:10 PM, Dmitry Baryshkov wrote: >>> On Mon, Jul 20, 2026 at 07:41:35PM +0530, Bibek Kumar Patro wrote: >>>> >>>> >>>> On 7/8/2026 8:48 PM, Bjorn Andersson wrote: >>>>> On Wed, Jul 08, 2026 at 08:22:00PM +0530, Bibek Kumar Patro wrote: >>>>>> >>>>>> >>>>>> On 7/7/2026 10:12 PM, Dmitry Baryshkov wrote: >>>>>>> On Tue, Jul 07, 2026 at 06:06:59PM +0530, Bibek Kumar Patro wrote: >>>>>>>> >>>>>>>> >>>>>>>> On 7/6/2026 11:09 PM, Dmitry Baryshkov wrote: [...] >> >> As per the design it will be applicable to all targets with MMU-500, >> (Even though issue hasn't been reported for all the targets on MMU-500, >> e.g sm8650/sm8250 but the nodes will still be needed). >> It's independent of adreno version i.e A6xx+/A5xx+. > > Ack, this sounds reasonable and allows you to easility select if the fix > is to be applied or not by using the generic compat strings. > I'll share the updated implementation in next revision. >> >> Adreno SMMU — upstream Qualcomm targets >> >> SMMU-v2 (QSMMU) >> Platform Compatible >> --------- ------------------------------------ >> MSM8996 qcom,msm8996-smmu-v2, qcom,adreno-smmu >> SDM670 qcom,sdm670-smmu-v2, qcom,adreno-smmu >> SDM845 qcom,sdm845-smmu-v2, qcom,adreno-smmu >> SC7180 qcom,sc7180-smmu-v2, qcom,adreno-smmu >> SM6350 qcom,sm6350-smmu-v2, qcom,adreno-smmu >> SM7150 qcom,sm7150-smmu-v2, qcom,adreno-smmu >> SM6375 qcom,sm6375-smmu-v2 (apps only, no adreno-smmu node) > > adreno_smmu: iommu@5940000 { > compatible = "qcom,sm6375-smmu-v2", "qcom,smmu-v2"; > > >> MSM8998 qcom,msm8998-smmu-v2 (apps only, no adreno-smmu node) > > adreno_smmu: iommu@5040000 { > compatible = "qcom,msm8998-smmu-v2", "qcom,smmu-v2"; > > I see, these targets are not using the fallback 'qcom,adreno-smmu' compatible for gfx smmu node. >> SDM630 qcom,sdm630-smmu-v2 (adreno binding to be fixed) > > What exactly needs to be fixed? > > kgsl_smmu: iommu@5040000 { > compatible = "qcom,sdm630-smmu-v2", "qcom,adreno-smmu", > "qcom,smmu-v2"; > Binding seems to be correct for sdm630 as I rechecked. Missed it the first time. This combination is already defined under ' - description: Qcom Adreno GPUs implementing "arm,smmu-v2" ' So no fix needed here. > >> >> SMMU-500 (MMU-500) — with qcom,adreno-smmu >> Platform Compatible >> --------- ------------------------------------ >> SM6115 qcom,sm6115-smmu-500, qcom,adreno-smmu >> QCM2290 qcom,qcm2290-smmu-500, qcom,adreno-smmu >> SM8150 qcom,sm8150-smmu-500, qcom,adreno-smmu >> SM8250 qcom,sm8250-smmu-500, qcom,adreno-smmu >> SC8180x qcom,sc8180x-smmu-500, qcom,adreno-smmu >> SM8350 qcom,sm8350-smmu-500, qcom,adreno-smmu >> SC7280 qcom,sc7280-smmu-500, qcom,adreno-smmu ← our patch series >> SM8450 qcom,sm8450-smmu-500, qcom,adreno-smmu >> SC8280xp qcom,sc8280xp-smmu-500, qcom,adreno-smmu >> QCS615 qcom,qcs615-smmu-500, qcom,adreno-smmu ← our patch series >> SM8550 qcom,sm8550-smmu-500, qcom,adreno-smmu >> SA8775P qcom,sa8775p-smmu-500, qcom,adreno-smmu ← our patch series >> SM8650 qcom,sm8650-smmu-500, qcom,adreno-smmu >> QCS8300 qcom,qcs8300-smmu-500, qcom,adreno-smmu ← our patch series >> SAR2130P qcom,sar2130p-smmu-500, qcom,adreno-smmu >> X1E80100 qcom,x1e80100-smmu-500, qcom,adreno-smmu >> Glymur qcom,glymur-smmu-500, qcom,adreno-smmu >> Milos qcom,milos-smmu-500, qcom,adreno-smmu >> >> SMMU-500 — without qcom,adreno-smmu (apps SMMU only) >> SDM670 qcom,sdm670-smmu-500 (apps) >> SDM845 qcom,sdm845-smmu-500 (apps) >> SC7180 qcom,sc7180-smmu-500 (apps) >> SM6350 qcom,sm6350-smmu-500 (apps) > > All these platforms use a separate v2 QSMMU for Adreno > Yes, on these platforms, apps SMMU / system TCU is MMU-500, while adreno/GFX TCU is smmu-v2 variant. >> SM8450 qcom,sm8450-smmu-500 (apps) > > adreno_smmu: iommu@3da0000 { > compatible = "qcom,sm8450-smmu-500", "qcom,adreno-smmu", > "qcom,smmu-500", "arm,mmu-500"; > > >> SC8280xp qcom,sc8280xp-smmu-500 (apps) > > gpu_smmu: iommu@3da0000 { > compatible = "qcom,sc8280xp-smmu-500", "qcom,adreno-smmu", > "qcom,smmu-500", "arm,mmu-500"; > Ah, thanks for catching this 2 platforms. It would come in 'SMMU-500 (MMU-500) — with qcom,adreno-smmu' table. >> SM8750 qcom,sm8750-smmu-500 (adreno-smmu not available yet) > > Yes, patches pending, I think. Yes, those would be part of drm/msm support series for sm8750. Thanks & regards, Bibek>