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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org,
	mark.rutland@arm.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V2] arm64/cpufeature: Validate feature bits spacing in arm64_ftr_regs[]
Date: Tue, 7 Jul 2020 10:58:34 +0100	[thread overview]
Message-ID: <7cfdef28-9710-d08f-58b0-1f414cd741ba@arm.com> (raw)
In-Reply-To: <1593581140-4339-1-git-send-email-anshuman.khandual@arm.com>

Hi Anshuman,

On 07/01/2020 06:25 AM, Anshuman Khandual wrote:
> arm64_feature_bits for a register in arm64_ftr_regs[] are in a descending
> order as per their shift values. Validate that these features bits are
> defined correctly and do not overlap with each other. This check protects
> against any inadvertent erroneous changes to the register definitions.

The patch looks fine to me. I have a few minor nits on the coding
style, feel free to ignore.


> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
> Applies on 5.8-rc3.
> 
> Changes in V2:
> 
> - Replaced WARN_ON() with WARN() dropping the conditional block per Suzuki
> 
> Changes in V1: (https://patchwork.kernel.org/patch/11606285/)
> 
>   arch/arm64/kernel/cpufeature.c | 45 +++++++++++++++++++++++++++++++---
>   1 file changed, 42 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 9f63053a63a9..7bd7e6f936a5 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -697,11 +697,50 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new,
>   
>   static void __init sort_ftr_regs(void)
>   {
> -	int i;
> +	

> +	unsigned int i;


> +
> +	for (i = 0; i < ARRAY_SIZE(arm64_ftr_regs); i++) {
	 const struct arm64_ftr_reg *ftr_reg = arm64_ftr_regs[i].reg;
  	 const struct arm64_ftr_bits *ftr_bits = ftr_reg->ftr_bits;
	 unsigned int j = 0;

> +		/*
> +		 * Features here must be sorted in descending order with respect
> +		 * to their shift values and should not overlap with each other.
> +		 */
> +		ftr_reg = arm64_ftr_regs[i].reg;
> +		for (ftr_bits = ftr_reg->ftr_bits,
> +				ftr_bits->width != 0; ftr_bits++, j++) {
			unsigned int shift = ftr_bits->shift;
			unsigned int width = ftr_bits->width;
			unsigned int prev_shift;

> +			WARN((ftr_bits->shift  + ftr_bits->width) > 64,
> +				"%s has invalid feature at shift %d\n",
> +				ftr_reg->name, ftr_bits->shift);

			WARN(shit + width > 64, ....);


Either way,

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>

      reply	other threads:[~2020-07-07  9:53 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-01  5:25 Anshuman Khandual
2020-07-07  9:58 ` Suzuki K Poulose [this message]

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