From: Ciprian Costea <dan.carpenter@linaro.org>
To: Srinivas Kandagatla <srini@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Ciprian Costea <ciprianmarian.costea@nxp.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linaro-s32@linaro.org, NXP S32 Linux Team <s32@nxp.com>,
Srinivas Kandagatla <srini@kernel.org>
Subject: [PATCH 1/3] dt-bindings: nvmem: Add the nxp,s32g-ocotp yaml file
Date: Sat, 16 Aug 2025 13:47:03 +0300 [thread overview]
Message-ID: <7d0e025ed3fdc9e545f1d0b84f6a1cbb9dfb4e91.1755341000.git.dan.carpenter@linaro.org> (raw)
In-Reply-To: <cover.1755341000.git.dan.carpenter@linaro.org>
Add bindings to expose the On Chip One-Time Programmable Controller
(OCOTP) for the NXP s32g chipset. There are three versions of this
chip but they're compatible so we can fall back to the nxp,s32g2-ocotp
compatible.
Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
---
.../bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml
new file mode 100644
index 000000000000..19f3bb6b7eb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/nxp,s32g-ocotp-nvmem.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP S32G OCOTP NVMEM driver
+
+maintainers:
+ - Ciprian Costea <ciprianmarian.costea@nxp.com>
+
+description: |
+ The drivers provides an interface to access One Time
+ Programmable memory pages, such as TMU fuse values.
+
+allOf:
+ - $ref: nvmem.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - nxp,s32g3-ocotp
+ - nxp,s32r45-ocotp
+ - const: nxp,s32g2-ocotp
+
+ reg:
+ description:
+ Address and Size of the fuse bank to be read.
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - '#address-cells'
+ - '#size-cells'
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/nvmem/s32g-ocotp-nvmem.h>
+
+ ocotp: ocotp@400a4000 {
+ compatible = "nxp,s32g2-ocotp";
+ reg = <0x400a4000 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "okay";
+ };
--
2.47.2
next prev parent reply other threads:[~2025-08-16 10:47 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-16 10:46 [PATCH 0/3] nvmem: s32g-ocotp: Add driver for S32G OCOTP Dan Carpenter
2025-08-16 10:47 ` Ciprian Costea [this message]
2025-08-16 12:29 ` [PATCH 1/3] dt-bindings: nvmem: Add the nxp,s32g-ocotp yaml file Rob Herring (Arm)
2025-08-17 5:48 ` Krzysztof Kozlowski
2025-08-18 8:03 ` Krzysztof Kozlowski
2025-08-16 10:47 ` [PATCH 2/3] nvmem: s32g-ocotp: Add driver for S32G OCOTP Ciprian Costea
2025-08-17 5:52 ` Krzysztof Kozlowski
2025-08-19 11:47 ` Srinivas Kandagatla
2025-08-16 10:47 ` [PATCH 3/3] arm64: dts: s32g: Add device tree information for the OCOTP driver Dan Carpenter
2025-08-17 5:53 ` Krzysztof Kozlowski
2025-08-18 18:24 ` [PATCH 0/3] nvmem: s32g-ocotp: Add driver for S32G OCOTP Rob Herring (Arm)
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