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Wed, 16 Sep 2026 22:42:48 -0700 (PDT) X-Received: by 2002:a05:6a21:514:b0:3c3:6928:8b25 with SMTP id adf61e73a8af0-3dd5f5ab211mr15101484637.17.1789623767817; Wed, 16 Sep 2026 22:42:47 -0700 (PDT) Received: from [10.204.78.119] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33bf5af4f0bsm14466679eec.24.2026.09.16.22.42.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 16 Sep 2026 22:42:47 -0700 (PDT) Message-ID: <7d2611bb-532f-4553-9d16-66c4b9c495c9@oss.qualcomm.com> Date: Thu, 17 Sep 2026 11:12:38 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 03/17] dt-bindings: display/msm: Document Nord MDSS To: Shawn Guo Cc: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Kuogee Hsieh , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Ritesh Kumar , Mahadevan P References: <20260911-nord-drv-dt-v1-0-e25c073cf1b6@oss.qualcomm.com> <20260911-nord-drv-dt-v1-3-e25c073cf1b6@oss.qualcomm.com> Content-Language: en-GB From: Nabige Aala In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: n7_OLOTOiWEQkkHz-Yt_sGA2Bd-M3ZGd X-Proofpoint-ORIG-GUID: n7_OLOTOiWEQkkHz-Yt_sGA2Bd-M3ZGd X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE3MDA3MyBTYWx0ZWRfX42wc0UXCv2K6 2OElG55lqVo+7fCmgWp+wI3jOUZml9/Yf/rElavbJjyTg+YXXll8hGOQs1YWT7ICYxe6A4X9TfO kRfeEGkocD3b3MvepqkaFacR1dx7scD4a355+CtM2iBDv2HxGFBmObi3PgZOGzBVxaj3L886/8V GKFoVvn4i52YN0wF+ZodUenihHcgIxJTfBalvbawZpu7Uf9rXoT8b/3grcAnY84c3imEQ0SYIrf GgjezKq2UbyIJUrF8Pmjw4h60vq1KLdXx/LDhZDhItDM9guiKsNqTpRRHmsGr4aF+83/oIbnx2w 469yQ4gM38JdPeOera3VelfgCzHO0eb4sLnvJ/0/JHMOS13X5Qj2uXetqUCE/aBGf4dQUuM9gHM mzXFpy7SJLUYPuZ4wV8ubuzfEkJTrniWiv/PIa6jMVmtBA2S//5XT80Mhm9ectrvF6a6+WtCmPU giMi21BpyztWu39blww== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE3MDA3MyBTYWx0ZWRfX2EzB8v8vfhpR FzSpRlsfupm042C0V/VXveMHFxcuYq77LOrAjOubUL92TJpA0s+8FNz8HRbLgJ0cvm5ee5OnDhV 30IiaMr0mVddSKnQ2icPECkRP/yuF+E= X-Authority-Analysis: v=2.4 cv=VIRIDNPX c=1 sm=1 tr=0 ts=6aab7dd9 cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=gEfo2CItAAAA:8 a=JfrnYn6hAAAA:8 a=EUspDBNiAAAA:8 a=T1TI9GLrlG5TBy_zXBgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 a=sptkURWiP4Gy88Gu7hUp:22 a=1CNFftbPRP8L7MoqJWF3:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-16_03,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 adultscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609170073 On 9/17/2026 7:06 AM, Shawn Guo wrote: > On Fri, Sep 11, 2026 at 09:06:34PM +0530, Nabige Aala wrote: >> From: Mahadevan P >> >> Add the binding for the display subsystem (MDSS) found on the Qualcomm >> Nord SoC. Nord is MDSS 12.1, DP-only (no DSI), with two independent DP >> controllers. >> >> Signed-off-by: Mahadevan P >> Signed-off-by: Nabige Aala >> --- >> .../bindings/display/msm/qcom,nord-mdss.yaml | 98 ++++++++++++++++++++++ >> 1 file changed, 98 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml >> new file mode 100644 >> index 000000000000..0b0cacdca9db >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/display/msm/qcom,nord-mdss.yaml >> @@ -0,0 +1,98 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/display/msm/qcom,nord-mdss.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Nord display subsystem (MDSS) >> + >> +maintainers: >> + - Mahadevan P >> + >> +description: >> + Nord display subsystem consists of MDSS (display controller), DPU 1499A >> + (display processing unit), and display interface controllers (DP only, no DSI). >> + This is MDSS 12.1, DP-only, with 2 independent DP controllers. >> + >> +$ref: /schemas/display/msm/mdss-common.yaml# >> + >> +properties: >> + compatible: >> + const: qcom,nord-mdss >> + >> + clocks: >> + items: >> + - description: Display AHB >> + - description: Display hf AXI >> + - description: Display core >> + >> + clock-names: >> + items: >> + - const: iface >> + - const: bus >> + - const: core >> + >> + iommus: >> + maxItems: 1 > The DTS in downstream repository doesn't seem to agree. There is two > items for iommus. I checked the Nord IPCAT. the resulted SID is same for both the SID (i.e.  0x03e0) in downstream repository. I think we should update the downstream DT and use a single SID entry. >> + >> + interconnects: >> + items: >> + - description: Interconnect path from mdp0 port to the data bus >> + - description: Interconnect path from CPU to the reg bus >> + >> + interconnect-names: >> + items: >> + - const: mdp0-mem >> + - const: cpu-cfg >> + >> +patternProperties: >> + "^display-controller@[0-9a-f]+$": >> + type: object >> + additionalProperties: true >> + properties: >> + compatible: >> + const: qcom,nord-dpu >> + >> + "^displayport-controller@[0-9a-f]+$": >> + type: object >> + additionalProperties: true >> + properties: >> + compatible: >> + const: qcom,nord-dp >> + >> + "^phy@[0-9a-f]+$": >> + type: object >> + additionalProperties: true >> + properties: >> + compatible: >> + const: qcom,nord-dp-phy >> + >> +required: >> + - compatible >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + #include > Please run dt_binding_check against mainline kernel where the header is > actually qcom,nord-dispcc.h. Ack, I will update according to mainline kernel. Thanks, Nabige > > Shawn > >> + #include >> + #include >> + >> + display-subsystem@ae00000 { >> + compatible = "qcom,nord-mdss"; >> + reg = <0x0ae00000 0x1000>; >> + reg-names = "mdss"; >> + power-domains = <&dispcc_gdsc>; >> + clocks = <&dispcc DISPCC_MDSS_AHB_CLK>, >> + <&gcc GCC_DISP_HF_AXI_CLK>, >> + <&dispcc DISPCC_MDSS_MDP_CLK>; >> + clock-names = "iface", "bus", "core"; >> + resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; >> + interrupts = ; >> + interrupt-controller; >> + #interrupt-cells = <1>; >> + iommus = <&apps_smmu 0x800 0x420>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges; >> + }; >> >> -- >> 2.34.1 >> >> >> -- >> linux-phy mailing list >> linux-phy@lists.infradead.org >> https://lists.infradead.org/mailman/listinfo/linux-phy