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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id c10-20020adfed8a000000b003062b2c5255sm2268734wro.40.2023.05.16.04.10.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 May 2023 04:10:20 -0700 (PDT) Message-ID: <7d3d0e78-e569-852c-ecb1-c714cc4fe9ba@monstr.eu> Date: Tue, 16 May 2023 13:10:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 22/23] arm64: zynqmp: Describe bus-width for SD card on KV260 Content-Language: en-US To: Michal Simek , linux-kernel@vger.kernel.org, michal.simek@xilinx.com, git@xilinx.com Cc: Andrew Davis , Ashok Reddy Soma , Geert Uytterhoeven , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: From: Michal Simek In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/2/23 15:35, Michal Simek wrote: > SD card is connected with 4 data lines which should be described properly. > > Signed-off-by: Michal Simek > --- > > arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 1 + > arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso > index 776444714fad..dcc51b3adab0 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso > @@ -136,6 +136,7 @@ &sdhci1 { /* on CC with tuned parameters */ > disable-wp; > xlnx,mio-bank = <1>; > assigned-clock-rates = <187498123>; > + bus-width = <4>; > }; > > &gem3 { /* required by spec */ > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso > index 78d082a11492..3384df3d5920 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso > @@ -119,6 +119,7 @@ &sdhci1 { /* on CC with tuned parameters */ > clk-phase-uhs-sdr25 = <120>, <60>; > clk-phase-uhs-ddr50 = <126>, <48>; > assigned-clock-rates = <187498123>; > + bus-width = <4>; > }; > > &gem3 { /* required by spec */ Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs