Re: [PATCH] [RESEND] perf/x86/intel/uncore: Fix the index of PCU.3 Broadwell CPUs

["Liang, Kan" <kan.liang@linux.intel.com>]

On 7/15/2018 6:34 PM, Ingo Molnar wrote:
> 
> * Masayoshi Mizuma <msys.mizuma@gmail.com> wrote:
> 
>> From: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
>>
>> commit 15a3e845b01c ("perf/x86/intel/uncore: Fix SBOX support for
>> Broadwell CPUs") introduced PCU.3 for Broadwell CPU. Unfortunately,
>> the driver_data of PCU.3 conflicts to QPI Port 2 filter.
>>
>>      { /* QPI Port 2 filter  */
>>              PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f46),
>>              .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV, 2),
>>
>>      { /* PCU.3 (for Capability registers) */
>>              PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6fc0),
>>              .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
>>                                                 HSWEP_PCI_PCU_3),
>>                               // HSWEP_PCI_PCU_3 == 2
> 
>> --- a/arch/x86/events/intel/uncore_snbep.c
>> +++ b/arch/x86/events/intel/uncore_snbep.c
>> @@ -1030,6 +1030,7 @@ enum {
>>   	SNBEP_PCI_QPI_PORT0_FILTER,
>>   	SNBEP_PCI_QPI_PORT1_FILTER,
>>   	HSWEP_PCI_PCU_3,
>> +	BDX_PCI_PCU_3,
>>   };
> 
> So we use a magic '2' enumerator in the 'QPI Port 2 filter', and that overlaps
> with HSWEP_PCI_PCU_3, right?
> 
> Shouldn't we clean up all the enumerators and not use magic numbers, and this fix
> the conflict?
>

Yes, it should fix the conflict. I will clean up the code.

Thanks,
Kan


> Thanks,
> 
> 	Ingo
>