From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Daniel J Blueman <daniel@quora.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
linux-arm-msm@vger.kernel.org
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: hamoa: Set MDP MMCX corners to LOW_SVS per Windows
Date: Mon, 25 May 2026 15:05:58 +0200 [thread overview]
Message-ID: <7d9ea19b-c6f3-4f14-8752-994fea304a17@oss.qualcomm.com> (raw)
In-Reply-To: <20260524115704.9442-1-daniel@quora.org>
On 5/24/26 1:57 PM, Daniel J Blueman wrote:
> On the Lenovo Slim 7x with Qualcomm X1 E80100, the current Windows ACPI
> DSDT votes LOW_SVS (0x40) for all 7 MMCX OPP packages in the _SB.PEP0.G0MD
> F-state EXIT package:
>
> "FSTATE",
> Zero,
> Package (...)
> {
> "EXIT",
> Package (0x02)
> {
> "NPARESOURCE",
> Package (0x03)
> {
> One,
> "/arc/client/rail_mmcx",
> 0x40
> }
> },
> ...
> },
>
> Apply the same in Linux for power saving opportunity. Validated on Lenovo
> Slim7x across daily workloads over 2 weeks with the internal 2944x1840
> panel @ 90Hz and a 3840x2160 @ 60Hz monitor over USB-C MST DP alt.
This ""works"" because the DP host holds a higher vote on the same rail
The max frequency for the MDP core clock at LOWSVS is 200 MHz, so this
patch is incorrect
Konrad
prev parent reply other threads:[~2026-05-25 13:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-24 11:57 Daniel J Blueman
2026-05-25 13:05 ` Konrad Dybcio [this message]
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