From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD8B3C433EF for ; Tue, 8 Mar 2022 13:43:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347180AbiCHNoo (ORCPT ); Tue, 8 Mar 2022 08:44:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244837AbiCHNom (ORCPT ); Tue, 8 Mar 2022 08:44:42 -0500 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 821A02981D; Tue, 8 Mar 2022 05:43:45 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id 699F61F433C1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1646747024; bh=NMkI5U2fS3DTtxbEUky+boxYlRLGC7eJNGLmCbs5kVc=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=PxpxDrkl5qzxpPW6AfwTM/R+CUAInFfgUJZyyZXeoP0y64bg7kwxFlvzVx5RmvhGj b9f1L3yzQ9Shyg1MMTLVXOaBuPCjFglYeH/biKkN8EEuHTuIZnJ6T983n+qg00HvGj CwemK8yFnYsqHSSTrgQ/JuURxtpyINKUr7RMY/kDsXUQuSeJLnAD2sJyezhLvN+Xkb 0tl/nBOuUKq/yDdXPTE1MacFzRrr8IAn/Ho83QEi1eKo2kbnrTQg01W5Np+0dAXoti Z8HGOCutLgwz4FGBEbm7Q5z/pA79tqX7z9nGoZrwOses5mUEU80bR73/k5cFoEH68o Tua0Q5ivbvHYA== Message-ID: <7df918e0-ce47-610e-512a-32e166aa909d@collabora.com> Date: Tue, 8 Mar 2022 14:43:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [RESEND v13 01/22] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 Content-Language: en-US To: "Nancy.Lin" , Rob Herring , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , wim@linux-watchdog.org, linux@roeck-us.net Cc: David Airlie , Daniel Vetter , Nathan Chancellor , Nick Desaulniers , "jason-jh . lin" , Yongqiang Niu , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, llvm@lists.linux.dev, singo.chang@mediatek.com, srv_heupstream@mediatek.com, Project_Global_Chrome_Upstream_Group@mediatek.com References: <20220308093018.24189-1-nancy.lin@mediatek.com> <20220308093018.24189-2-nancy.lin@mediatek.com> From: AngeloGioacchino Del Regno In-Reply-To: <20220308093018.24189-2-nancy.lin@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 08/03/22 10:29, Nancy.Lin ha scritto: > Add vdosys1 RDMA definition. > > Signed-off-by: Nancy.Lin Reviewed-by: AngeloGioacchino Del Regno > --- > .../arm/mediatek/mediatek,mdp-rdma.yaml | 86 +++++++++++++++++++ > 1 file changed, 86 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml > new file mode 100644 > index 000000000000..6ab773569462 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml > @@ -0,0 +1,86 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mdp-rdma.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek MDP RDMA > + > +maintainers: > + - Matthias Brugger > + > +description: | > + The mediatek MDP RDMA stands for Read Direct Memory Access. > + It provides real time data to the back-end panel driver, such as DSI, > + DPI and DP_INTF. > + It contains one line buffer to store the sufficient pixel data. > + RDMA device node must be siblings to the central MMSYS_CONFIG node. > + For a description of the MMSYS_CONFIG binding, see > + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details. > + > +properties: > + compatible: > + oneOf: > + - items: > + - const: mediatek,mt8195-vdo1-rdma > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + power-domains: > + description: A phandle and PM domain specifier as defined by bindings of > + the power controller specified by phandle. See > + Documentation/devicetree/bindings/power/power-domain.yaml for details. > + > + clocks: > + items: > + - description: RDMA Clock > + > + iommus: > + description: > + This property should point to the respective IOMMU block with master port as argument, > + see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. > + > + mediatek,gce-client-reg: > + description: > + The register of display function block to be set by gce. There are 4 arguments, > + such as gce node, subsys id, offset and register size. The subsys id that is > + mapping to the register of display function blocks is defined in the gce header > + include/include/dt-bindings/gce/-gce.h of each chips. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - power-domains > + - clocks > + - iommus > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + #include > + #include > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + vdo1_rdma0: mdp-rdma@1c104000 { > + compatible = "mediatek,mt8195-vdo1-rdma"; > + reg = <0 0x1c104000 0 0x1000>; > + interrupts = ; > + clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; > + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; > + iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; > + mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>; > + }; > + };